| Message ID | 20250211194407.2577252-3-sohil.mehta@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Prepare for new Intel Family numbers | expand |
On 2/11/25 11:43, Sohil Mehta wrote: > Currently only Family 6 is considered as modern and avoids the 10 msec > INIT delay. The optimization doesn't extend to the upcoming Family 18/19 > models. This doesn't quite parse correctly to me. Let's say it this way: Some old crusty CPUs need an extra delay that slows down booting. See the comment above 'init_udelay' for details. Newer CPUs don't need the delay. Right now, for Intel, Family 6 and only Family 6 skips the delay. That leaves out both the Family 15 (Pentium 4s) and brand new Family 18/19 models. The omission of Family 15 (Pentium 4s) seems like an oversight and 18/19 do not need the delay. Skip the delay on all Intel processors Family 6 and beyond. Is there anything wrong there?
On 2/11/2025 12:10 PM, Dave Hansen wrote: > On 2/11/25 11:43, Sohil Mehta wrote: >> Currently only Family 6 is considered as modern and avoids the 10 msec >> INIT delay. The optimization doesn't extend to the upcoming Family 18/19 >> models. > > This doesn't quite parse correctly to me. > > Let's say it this way: > > Some old crusty CPUs need an extra delay that slows down > booting. See the comment above 'init_udelay' for details. Newer > CPUs don't need the delay. > > Right now, for Intel, Family 6 and only Family 6 skips the > delay. That leaves out both the Family 15 (Pentium 4s) and brand > new Family 18/19 models. > > The omission of Family 15 (Pentium 4s) seems like an oversight > and 18/19 do not need the delay. > > Skip the delay on all Intel processors Family 6 and beyond. > > Is there anything wrong there? No, it is accurate.
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index eb91ed0f2a06..871c61df4edb 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -675,9 +675,9 @@ static void __init smp_set_init_udelay(void) return; /* if modern processor, use no delay */ - if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) || - ((boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) && (boot_cpu_data.x86 >= 0x18)) || - ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF))) { + if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && boot_cpu_data.x86_vfm >= INTEL_PENTIUM_PRO) || + (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON && boot_cpu_data.x86 >= 0x18) || + (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && boot_cpu_data.x86 >= 0xF)) { init_udelay = 0; return; }
Currently only Family 6 is considered as modern and avoids the 10 msec INIT delay. The optimization doesn't extend to the upcoming Family 18/19 models. Also, the omission of Family 15 (Pentium 4s) seems like an oversight and should probably be included in the modern check as well. Choose a simpler check and extend the optimization to all Intel processors Family 6 and beyond. Signed-off-by: Sohil Mehta <sohil.mehta@intel.com> --- v2: Make the changelog more precise --- arch/x86/kernel/smpboot.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)