diff mbox series

[v2,9/9] hwmon: (nct7904) Fix wrong registers setting for temperature.

Message ID 9b03a23bbb5385658c21bf5129a5b1c9b5065237.1560756733.git.amy.shih@advantech.com.tw (mailing list archive)
State Changes Requested
Headers show
Series [v2,1/9] hwmon: (nct7904) Add error handling in probe function. | expand

Commit Message

Amy.Shih@advantech.com.tw June 17, 2019, 8:22 a.m. UTC 
From: "amy.shih" <amy.shih@advantech.com.tw>

For "attributes temp[1-*]_max" and "temp[1-*]_max_hyst", should
show the reading of "WARNING TEMPERATURE" and "WARNING TEMPERATURE
HYSTERESIS" registers. For attribute "temp[1-*]_crit" and
"temp[1-*]_crit_hyst", shuld show the reading of "CRITICAL TEMPERATURE"
and "CRITICAL TEMPERATURE HYSTERESIS" registers in datasheet.

Signed-off-by: amy.shih <amy.shih@advantech.com.tw>
---
Changes in v2:
- Fix wrong registers setting for temperature.

 drivers/hwmon/nct7904.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/drivers/hwmon/nct7904.c b/drivers/hwmon/nct7904.c
index fc145c73a4e7..d842c10ba11f 100644
--- a/drivers/hwmon/nct7904.c
+++ b/drivers/hwmon/nct7904.c
@@ -399,23 +399,23 @@  static int nct7904_read_temp(struct device *dev, u32 attr, int channel,
 		return 0;
 	case hwmon_temp_max:
 		reg1 = LTD_HV_HL_REG;
-		reg2 = TEMP_CH1_C_REG;
-		reg3 = DTS_T_CPU1_C_REG;
+		reg2 = TEMP_CH1_W_REG;
+		reg3 = DTS_T_CPU1_W_REG;
 		break;
 	case hwmon_temp_max_hyst:
 		reg1 = LTD_LV_HL_REG;
-		reg2 = TEMP_CH1_CH_REG;
-		reg3 = DTS_T_CPU1_CH_REG;
+		reg2 = TEMP_CH1_WH_REG;
+		reg3 = DTS_T_CPU1_WH_REG;
 		break;
 	case hwmon_temp_crit:
 		reg1 = LTD_HV_LL_REG;
-		reg2 = TEMP_CH1_W_REG;
-		reg3 = DTS_T_CPU1_W_REG;
+		reg2 = TEMP_CH1_C_REG;
+		reg3 = DTS_T_CPU1_C_REG;
 		break;
 	case hwmon_temp_crit_hyst:
 		reg1 = LTD_LV_LL_REG;
-		reg2 = TEMP_CH1_WH_REG;
-		reg3 = DTS_T_CPU1_WH_REG;
+		reg2 = TEMP_CH1_CH_REG;
+		reg3 = DTS_T_CPU1_CH_REG;
 		break;
 	default:
 		return -EOPNOTSUPP;
@@ -508,23 +508,23 @@  static int nct7904_write_temp(struct device *dev, u32 attr, int channel,
 	switch (attr) {
 	case hwmon_temp_max:
 		reg1 = LTD_HV_HL_REG;
-		reg2 = TEMP_CH1_C_REG;
-		reg3 = DTS_T_CPU1_C_REG;
+		reg2 = TEMP_CH1_W_REG;
+		reg3 = DTS_T_CPU1_W_REG;
 		break;
 	case hwmon_temp_max_hyst:
 		reg1 = LTD_LV_HL_REG;
-		reg2 = TEMP_CH1_CH_REG;
-		reg3 = DTS_T_CPU1_CH_REG;
+		reg2 = TEMP_CH1_WH_REG;
+		reg3 = DTS_T_CPU1_WH_REG;
 		break;
 	case hwmon_temp_crit:
 		reg1 = LTD_HV_LL_REG;
-		reg2 = TEMP_CH1_W_REG;
-		reg3 = DTS_T_CPU1_W_REG;
+		reg2 = TEMP_CH1_C_REG;
+		reg3 = DTS_T_CPU1_C_REG;
 		break;
 	case hwmon_temp_crit_hyst:
 		reg1 = LTD_LV_LL_REG;
-		reg2 = TEMP_CH1_WH_REG;
-		reg3 = DTS_T_CPU1_WH_REG;
+		reg2 = TEMP_CH1_CH_REG;
+		reg3 = DTS_T_CPU1_CH_REG;
 		break;
 	default:
 		return -EOPNOTSUPP;