[v1] Support the TI TPS53685 driver

Commit Message

ChiangBrian 江泳緻 TAO Dec. 25, 2024, 9:54 a.m. UTC

From: Brian Chiang<[e-mail]>

As the driver is not supported, TPS53685 reading is added based on the
datasheet.

Signed-off-by: Brian Chiang<[e-mail]>
---
 drivers/hwmon/pmbus/tps53679.c | 58 ++++++++++++++++++++++++++++++++--
 1 file changed, 56 insertions(+), 2 deletions(-)

  * Since those chips have special configuration registers, we want to have
@@ -132,12 +157,33 @@ static int tps53679_identify_multiphase(struct
i2c_client *client,
    return tps53679_identify_phases(client, info);
 }

+static int tps53685_identify_multiphase(struct i2c_client *client,
+                   struct pmbus_driver_info *info,
+                   int pmbus_rev)
+{
+   int ret;
+   ret = tps53685_identify_chip(client, pmbus_rev);
+   if (ret < 0)
+       return ret;
+
+   info->format[PSC_VOLTAGE_OUT] = linear;
+
+   return 0;
+}
+
 static int tps53679_identify(struct i2c_client *client,
                 struct pmbus_driver_info *info)
 {
    return tps53679_identify_mode(client, info);
 }

+static int tps53685_identify(struct i2c_client *client,
+                struct pmbus_driver_info *info)
+{
+   return tps53685_identify_multiphase(client, info,
+                       TPS53681_PMBUS_REVISION);
+}
+
 static int tps53681_identify(struct i2c_client *client,
                 struct pmbus_driver_info *info)
 {
@@ -215,7 +261,9 @@ static struct pmbus_driver_info tps53679_info = {
        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
        PMBUS_HAVE_POUT,
-   .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+   .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
+       PMBUS_HAVE_STATUS_INPUT |
+       PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
        PMBUS_HAVE_POUT,
@@ -263,6 +311,10 @@ static int tps53679_probe(struct i2c_client *client)
        info->identify = tps53681_identify;
        info->read_word_data = tps53681_read_word_data;
        break;
+   case tps53685:
+       info->pages = 2;
+       info->identify = tps53685_identify;
+       break;
    default:
        return -ENODEV;
    }
@@ -278,6 +330,7 @@ static const struct i2c_device_id tps53679_id[] = {
    {"tps53679", tps53679},
    {"tps53681", tps53681},
    {"tps53688", tps53688},
+   {"tps53685", tps53685},
    {}
 };

@@ -290,6 +343,7 @@ static const struct of_device_id __maybe_unused
tps53679_of_match[] = {
    {.compatible = "ti,tps53679", .data = (void *)tps53679},
    {.compatible = "ti,tps53681", .data = (void *)tps53681},
    {.compatible = "ti,tps53688", .data = (void *)tps53688},
+   {.compatible = "ti,tps53685", .data = (void *)tps53685},
    {}
 };
 MODULE_DEVICE_TABLE(of, tps53679_of_match);

Patch

diff --git a/drivers/hwmon/pmbus/tps53679.c b/drivers/hwmon/pmbus/tps53679.c
index 81b9d813655a..89753f004edb 100644
--- a/drivers/hwmon/pmbus/tps53679.c
+++ b/drivers/hwmon/pmbus/tps53679.c
@@ -16,7 +16,7 @@ 
 #include "pmbus.h"

 enum chips {
-   tps53647, tps53667, tps53676, tps53679, tps53681, tps53688
+   tps53647, tps53667, tps53676, tps53679, tps53681, tps53688, tps53685
 };

 #define TPS53647_PAGE_NUM      1
@@ -109,6 +109,31 @@  static int tps53679_identify_chip(struct
i2c_client *client,
    return 0;
 }

+static int tps53685_identify_chip(struct i2c_client *client,
+                 u8 revision)
+{
+   u8 buf[I2C_SMBUS_BLOCK_MAX];
+   int ret;
+
+   ret = pmbus_read_byte_data(client, 0, PMBUS_REVISION);
+   if (ret < 0)
+       return ret;
+   if (ret != revision) {
+       dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
+       return -ENODEV;
+   }
+
+   ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
+   if (ret < 0)
+       return ret;
+
+   if (strncmp("\x54\x49\x53\x68\x50\x00", buf, 6)) {
+       dev_err(&client->dev, "Unexpected device ID: %s\n", buf);
+       return -ENODEV;
+   }
+   return 0;
+}
+
 /*
  * Common identification function for chips with multi-phase support.