| Message ID | 20240920144432.62370-1-jarkko.nikula@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | i3c: mipi-i3c-hci: DMA interrupt fixes | expand |
Hi Jarkko, On 9/20/2024 20:14, Jarkko Nikula wrote: > Hi > > These are targeted for the v6.13 cycle, i.e for the i3c/next branch > after v6.12-rc1 is tagged. > > Patch 1/2 is stable looking material but I think it gets visible only > after patch 2/2 on a MIPI I3C HCI v1.0+ compatible HW so in my opinnion > should go through normal development cycle. > > AMD folks: You said you have non-functional DMA mode on your HW. Can the > patch 2/2 make it functional or are there some other than interrupt > issues? > These are RTL issues within the hardware. I don't believe the patch will help since the DMA mode never activates (at least with the current ASIC). Thanks, Shyam > Jarkko Nikula (2): > i3c: mipi-i3c-hci: Mask ring interrupts before ring stop request > i3c: mipi-i3c-hci: Handle interrupts according to current > specifications > > drivers/i3c/master/mipi-i3c-hci/core.c | 16 +++------------- > drivers/i3c/master/mipi-i3c-hci/dma.c | 10 +++------- > drivers/i3c/master/mipi-i3c-hci/hci.h | 2 +- > drivers/i3c/master/mipi-i3c-hci/pio.c | 2 +- > 4 files changed, 8 insertions(+), 22 deletions(-) >
On Fri, 20 Sep 2024 17:44:30 +0300, Jarkko Nikula wrote: > These are targeted for the v6.13 cycle, i.e for the i3c/next branch > after v6.12-rc1 is tagged. > > Patch 1/2 is stable looking material but I think it gets visible only > after patch 2/2 on a MIPI I3C HCI v1.0+ compatible HW so in my opinnion > should go through normal development cycle. > > [...] Applied, thanks! [1/2] i3c: mipi-i3c-hci: Mask ring interrupts before ring stop request https://git.kernel.org/abelloni/c/6ca2738174e4 [2/2] i3c: mipi-i3c-hci: Handle interrupts according to current specifications https://git.kernel.org/abelloni/c/45357c9b37bb Best regards,
Hi These are targeted for the v6.13 cycle, i.e for the i3c/next branch after v6.12-rc1 is tagged. Patch 1/2 is stable looking material but I think it gets visible only after patch 2/2 on a MIPI I3C HCI v1.0+ compatible HW so in my opinnion should go through normal development cycle. AMD folks: You said you have non-functional DMA mode on your HW. Can the patch 2/2 make it functional or are there some other than interrupt issues? Jarkko Nikula (2): i3c: mipi-i3c-hci: Mask ring interrupts before ring stop request i3c: mipi-i3c-hci: Handle interrupts according to current specifications drivers/i3c/master/mipi-i3c-hci/core.c | 16 +++------------- drivers/i3c/master/mipi-i3c-hci/dma.c | 10 +++------- drivers/i3c/master/mipi-i3c-hci/hci.h | 2 +- drivers/i3c/master/mipi-i3c-hci/pio.c | 2 +- 4 files changed, 8 insertions(+), 22 deletions(-)