@@ -2127,7 +2127,7 @@ int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
else
expected_dyn_addr = newdev->info.dyn_addr;
- if (newdev->info.dyn_addr != expected_dyn_addr) {
+ if (!master->secondary && newdev->info.dyn_addr != expected_dyn_addr) {
/*
* Try to apply the expected dynamic address. If it fails, keep
* the address assigned by the master.
@@ -2804,12 +2804,20 @@ int i3c_secondary_master_register(struct i3c_master_controller *master,
struct device *parent,
const struct i3c_master_controller_ops *ops)
{
- int ret;
+ int ret, sz;
ret = i3c_master_init(master, parent, ops, true);
if (ret)
return ret;
+ sz = sizeof(struct i3c_ccc_dev_desc) * I3C_BUS_MAX_DEVS;
+ master->defslvs_data.devs = devm_kzalloc(&master->dev, sz,
+ GFP_KERNEL);
+ if (!master->defslvs_data.devs) {
+ ret = -ENOMEM;
+ goto err_cleanup_bus;
+ }
+
ret = device_add(&master->dev);
if (ret)
goto err_cleanup_bus;
@@ -2842,6 +2850,62 @@ int i3c_secondary_master_register(struct i3c_master_controller *master,
}
EXPORT_SYMBOL_GPL(i3c_secondary_master_register);
+static int
+i3c_master_populate_bus(struct i3c_master_controller *master, u8 dyn_addr)
+{
+ struct i3c_dev_desc *olddev;
+ struct i3c_ccc_dev_desc *desc;
+ int ret, slot;
+
+ i3c_bus_for_each_i3cdev(&master->bus, olddev)
+ i3c_master_put_i3c_addrs(olddev);
+
+ master->this->info.dyn_addr = dyn_addr;
+ i3c_master_get_i3c_addrs(master->this);
+
+ desc = master->defslvs_data.devs;
+ for (slot = 1; slot < master->defslvs_data.ndevs; slot++) {
+ ret = i3c_master_add_i3c_dev_locked(master,
+ desc[slot].dyn_addr);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+/**
+ * i3c_master_process_defslvs() - process I3C device list received in
+ * DEFSLVS for device plug/unplug and address change.
+ * @m: I3C master object
+ * @dyn_addr: Current dynamic address of this device
+ *
+ * This function may sleep, so should not be called in the atomic context.
+ */
+int i3c_master_process_defslvs(struct i3c_master_controller *m, u8 dyn_addr)
+{
+ int ret;
+
+ i3c_bus_normaluse_lock(&m->bus);
+ ret = i3c_master_acquire_bus(m);
+ i3c_bus_normaluse_unlock(&m->bus);
+ if (ret)
+ return ret;
+
+ i3c_bus_maintenance_lock(&m->bus);
+ ret = i3c_master_populate_bus(m, dyn_addr);
+ i3c_bus_maintenance_unlock(&m->bus);
+ if (!ret) {
+ i3c_bus_normaluse_lock(&m->bus);
+ i3c_master_register_new_i3c_devs(m);
+ i3c_bus_normaluse_unlock(&m->bus);
+ }
+ i3c_master_enable_mr_events(m);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(i3c_master_process_defslvs);
+
/**
* i3c_master_unregister() - unregister an I3C master
* @master: master used to send frames on the bus
@@ -471,6 +471,8 @@ struct i3c_master_controller_ops {
* in a thread context. Typical examples are Hot Join processing which
* requires taking the bus lock in maintenance, which in turn, can only
* be done from a sleep-able context
+ * @defslvs_data: list used to pass i3c device list received in DEFSLVS message,
+ * from DEFSLVS controller driver to I3C core
*
* A &struct i3c_master_controller has to be registered to the I3C subsystem
* through i3c_master_register(). None of &struct i3c_master_controller fields
@@ -490,6 +492,10 @@ struct i3c_master_controller {
} boardinfo;
struct i3c_bus bus;
struct workqueue_struct *wq;
+ struct {
+ u32 ndevs;
+ struct i3c_ccc_dev_desc *devs;
+ } defslvs_data;
};
/**
@@ -516,6 +522,7 @@ struct i3c_master_controller {
void i3c_master_yield_bus(struct i3c_master_controller *m,
u8 sec_mst_dyn_addr);
+int i3c_master_process_defslvs(struct i3c_master_controller *m, u8 dyn_addr);
int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
const struct i2c_msg *xfers,
int nxfers);
Added defslvs processing code to the I3C master subsystem. Signed-off-by: Parshuram Thombare <pthombar@cadence.com> --- drivers/i3c/master.c | 68 ++++++++++++++++++++++++++++++++++++-- include/linux/i3c/master.h | 7 ++++ 2 files changed, 73 insertions(+), 2 deletions(-)