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Otherwise, the I2C devices cannot see the stop signal. It may cause message sending errors. Signed-off-by: Clark Wang Reviewed-by: Miquel Raynal --- V2/V3: No change. --- drivers/i3c/master/svc-i3c-master.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 91358cc5ca07..5677b5b31a86 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -449,7 +449,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) struct i3c_device_info info = {}; unsigned long fclk_rate, fclk_period_ns; unsigned int high_period_ns, od_low_period_ns; - u32 ppbaud, pplow, odhpp, odbaud, i2cbaud, reg; + u32 ppbaud, pplow, odhpp, odbaud, odstop, i2cbaud, reg; int ret; /* Timings derivation */ @@ -479,6 +479,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) switch (bus->mode) { case I3C_BUS_MODE_PURE: i2cbaud = 0; + odstop = 0; break; case I3C_BUS_MODE_MIXED_FAST: case I3C_BUS_MODE_MIXED_LIMITED: @@ -487,6 +488,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) * between the high and low period does not really matter. */ i2cbaud = DIV_ROUND_UP(1000, od_low_period_ns) - 2; + odstop = 1; break; case I3C_BUS_MODE_MIXED_SLOW: /* @@ -494,6 +496,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) * constraints as the FM+ mode. */ i2cbaud = DIV_ROUND_UP(2500, od_low_period_ns) - 2; + odstop = 1; break; default: return -EINVAL; @@ -502,7 +505,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) reg = SVC_I3C_MCONFIG_MASTER_EN | SVC_I3C_MCONFIG_DISTO(0) | SVC_I3C_MCONFIG_HKEEP(0) | - SVC_I3C_MCONFIG_ODSTOP(0) | + SVC_I3C_MCONFIG_ODSTOP(odstop) | SVC_I3C_MCONFIG_PPBAUD(ppbaud) | SVC_I3C_MCONFIG_PPLOW(pplow) | SVC_I3C_MCONFIG_ODBAUD(odbaud) |