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[174.21.177.9]) by smtp.gmail.com with ESMTPSA id z127sm20082025pfb.80.2019.02.02.13.56.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 02 Feb 2019 13:56:21 -0800 (PST) From: Martin Kelly X-Google-Original-From: Martin Kelly , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Rob Herring , Daniel Baluta , devicetree@vger.kernel.org, Martin Kelly Subject: [PATCH v4 3/6] dt-bindings: fix incorrect bmi160 IRQ note Date: Sat, 2 Feb 2019 13:55:58 -0800 Message-Id: <20190202215601.20275-4-martin@martingkelly.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190202215601.20275-1-martin@martingkelly.com> References: <20190202215601.20275-1-martin@martingkelly.com> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Martin Kelly The bmi160 bindings say that the BMI160 requires level-triggered, active-low interrupts, but it actually supports all interrupt types, so fix the note to reflect that. Reviewed-by: Rob Herring Signed-off-by: Martin Kelly --- Documentation/devicetree/bindings/iio/imu/bmi160.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/Documentation/devicetree/bindings/iio/imu/bmi160.txt b/Documentation/devicetree/bindings/iio/imu/bmi160.txt index 0c1c105fb503..1aec19997fb5 100644 --- a/Documentation/devicetree/bindings/iio/imu/bmi160.txt +++ b/Documentation/devicetree/bindings/iio/imu/bmi160.txt @@ -9,7 +9,7 @@ Required properties: - spi-max-frequency : set maximum clock frequency (only for SPI) Optional properties: - - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW + - interrupts : interrupt mapping for IRQ - interrupt-names : set to "INT1" if INT1 pin should be used as interrupt input, set to "INT2" if INT2 pin should be used instead @@ -20,7 +20,7 @@ bmi160@68 { reg = <0x68>; interrupt-parent = <&gpio4>; - interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + interrupts = <12 IRQ_TYPE_EDGE_RISING>; interrupt-names = "INT1"; };