| Message ID | 20190401143745.ooxttvazrlqe2lcc@smtp.gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | staging: iio: ad9832: use clock framework | expand |
On Mon, 1 Apr 2019 11:37:45 -0300 Marcelo Schmitt <marcelo.schmitt1@gmail.com> wrote: > Previously external clock were set through platform_data struct. > Now device uses clk struct defined in include/linux/clk.h to handle > external clock source. > It also removes mclk from platform_data struct. > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Looks good to me. Applied to the togreg branch of iio.git and pushed out as testing for the autobuilders to play with it. Thanks, Jonathan > --- > drivers/staging/iio/frequency/ad9832.c | 37 +++++++++++++++++--------- > drivers/staging/iio/frequency/ad9832.h | 1 - > 2 files changed, 25 insertions(+), 13 deletions(-) > > diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c > index d8d4a7936275..74308a2e72db 100644 > --- a/drivers/staging/iio/frequency/ad9832.c > +++ b/drivers/staging/iio/frequency/ad9832.c > @@ -7,6 +7,7 @@ > > #include <asm/div64.h> > > +#include <linux/clk.h> > #include <linux/device.h> > #include <linux/err.h> > #include <linux/kernel.h> > @@ -95,7 +96,7 @@ struct ad9832_state { > struct spi_device *spi; > struct regulator *avdd; > struct regulator *dvdd; > - unsigned long mclk; > + struct clk *mclk; > unsigned short ctrl_fp; > unsigned short ctrl_ss; > unsigned short ctrl_src; > @@ -130,10 +131,10 @@ static int ad9832_write_frequency(struct ad9832_state *st, > { > unsigned long regval; > > - if (fout > (st->mclk / 2)) > + if (fout > (clk_get_rate(st->mclk) / 2)) > return -EINVAL; > > - regval = ad9832_calc_freqreg(st->mclk, fout); > + regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout); > > st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | > (addr << ADD_SHIFT) | > @@ -334,7 +335,16 @@ static int ad9832_probe(struct spi_device *spi) > goto error_disable_avdd; > } > > - st->mclk = pdata->mclk; > + st->mclk = devm_clk_get(&spi->dev, "mclk"); > + if (IS_ERR(st->mclk)) { > + ret = PTR_ERR(st->mclk); > + goto error_disable_dvdd; > + } > + > + ret = clk_prepare_enable(st->mclk); > + if (ret < 0) > + goto error_disable_dvdd; > + > st->spi = spi; > mutex_init(&st->lock); > > @@ -385,39 +395,41 @@ static int ad9832_probe(struct spi_device *spi) > ret = spi_sync(st->spi, &st->msg); > if (ret) { > dev_err(&spi->dev, "device init failed\n"); > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > } > > ret = ad9832_write_frequency(st, AD9832_FREQ0HM, pdata->freq0); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = ad9832_write_frequency(st, AD9832_FREQ1HM, pdata->freq1); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = ad9832_write_phase(st, AD9832_PHASE0H, pdata->phase0); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = ad9832_write_phase(st, AD9832_PHASE1H, pdata->phase1); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = ad9832_write_phase(st, AD9832_PHASE2H, pdata->phase2); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = ad9832_write_phase(st, AD9832_PHASE3H, pdata->phase3); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > ret = iio_device_register(indio_dev); > if (ret) > - goto error_disable_dvdd; > + goto error_unprepare_mclk; > > return 0; > > +error_unprepare_mclk: > + clk_disable_unprepare(st->mclk); > error_disable_dvdd: > regulator_disable(st->dvdd); > error_disable_avdd: > @@ -432,6 +444,7 @@ static int ad9832_remove(struct spi_device *spi) > struct ad9832_state *st = iio_priv(indio_dev); > > iio_device_unregister(indio_dev); > + clk_disable_unprepare(st->mclk); > regulator_disable(st->dvdd); > regulator_disable(st->avdd); > > diff --git a/drivers/staging/iio/frequency/ad9832.h b/drivers/staging/iio/frequency/ad9832.h > index 39d326cc1af9..032579a2d539 100644 > --- a/drivers/staging/iio/frequency/ad9832.h > +++ b/drivers/staging/iio/frequency/ad9832.h > @@ -24,7 +24,6 @@ > */ > > struct ad9832_platform_data { > - unsigned long mclk; > unsigned long freq0; > unsigned long freq1; > unsigned short phase0;
diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c index d8d4a7936275..74308a2e72db 100644 --- a/drivers/staging/iio/frequency/ad9832.c +++ b/drivers/staging/iio/frequency/ad9832.c @@ -7,6 +7,7 @@ #include <asm/div64.h> +#include <linux/clk.h> #include <linux/device.h> #include <linux/err.h> #include <linux/kernel.h> @@ -95,7 +96,7 @@ struct ad9832_state { struct spi_device *spi; struct regulator *avdd; struct regulator *dvdd; - unsigned long mclk; + struct clk *mclk; unsigned short ctrl_fp; unsigned short ctrl_ss; unsigned short ctrl_src; @@ -130,10 +131,10 @@ static int ad9832_write_frequency(struct ad9832_state *st, { unsigned long regval; - if (fout > (st->mclk / 2)) + if (fout > (clk_get_rate(st->mclk) / 2)) return -EINVAL; - regval = ad9832_calc_freqreg(st->mclk, fout); + regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout); st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) | (addr << ADD_SHIFT) | @@ -334,7 +335,16 @@ static int ad9832_probe(struct spi_device *spi) goto error_disable_avdd; } - st->mclk = pdata->mclk; + st->mclk = devm_clk_get(&spi->dev, "mclk"); + if (IS_ERR(st->mclk)) { + ret = PTR_ERR(st->mclk); + goto error_disable_dvdd; + } + + ret = clk_prepare_enable(st->mclk); + if (ret < 0) + goto error_disable_dvdd; + st->spi = spi; mutex_init(&st->lock); @@ -385,39 +395,41 @@ static int ad9832_probe(struct spi_device *spi) ret = spi_sync(st->spi, &st->msg); if (ret) { dev_err(&spi->dev, "device init failed\n"); - goto error_disable_dvdd; + goto error_unprepare_mclk; } ret = ad9832_write_frequency(st, AD9832_FREQ0HM, pdata->freq0); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = ad9832_write_frequency(st, AD9832_FREQ1HM, pdata->freq1); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = ad9832_write_phase(st, AD9832_PHASE0H, pdata->phase0); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = ad9832_write_phase(st, AD9832_PHASE1H, pdata->phase1); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = ad9832_write_phase(st, AD9832_PHASE2H, pdata->phase2); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = ad9832_write_phase(st, AD9832_PHASE3H, pdata->phase3); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; ret = iio_device_register(indio_dev); if (ret) - goto error_disable_dvdd; + goto error_unprepare_mclk; return 0; +error_unprepare_mclk: + clk_disable_unprepare(st->mclk); error_disable_dvdd: regulator_disable(st->dvdd); error_disable_avdd: @@ -432,6 +444,7 @@ static int ad9832_remove(struct spi_device *spi) struct ad9832_state *st = iio_priv(indio_dev); iio_device_unregister(indio_dev); + clk_disable_unprepare(st->mclk); regulator_disable(st->dvdd); regulator_disable(st->avdd); diff --git a/drivers/staging/iio/frequency/ad9832.h b/drivers/staging/iio/frequency/ad9832.h index 39d326cc1af9..032579a2d539 100644 --- a/drivers/staging/iio/frequency/ad9832.h +++ b/drivers/staging/iio/frequency/ad9832.h @@ -24,7 +24,6 @@ */ struct ad9832_platform_data { - unsigned long mclk; unsigned long freq0; unsigned long freq1; unsigned short phase0;
Previously external clock were set through platform_data struct. Now device uses clk struct defined in include/linux/clk.h to handle external clock source. It also removes mclk from platform_data struct. Signed-off-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> --- drivers/staging/iio/frequency/ad9832.c | 37 +++++++++++++++++--------- drivers/staging/iio/frequency/ad9832.h | 1 - 2 files changed, 25 insertions(+), 13 deletions(-)