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Received: from nwd2mta2.analog.com (137.71.25.57) by BL2NAM02FT012.mail.protection.outlook.com (10.152.77.27) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.1987.11 via Frontend Transport; Fri, 21 Jun 2019 12:14:18 +0000 Received: from NWD2HUBCAS7.ad.analog.com (nwd2hubcas7.ad.analog.com [10.64.69.107]) by nwd2mta2.analog.com (8.13.8/8.13.8) with ESMTP id x5LCEIJ8023562 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Fri, 21 Jun 2019 05:14:18 -0700 Received: from mircea-Latitude-E6540.ad.analog.com (10.48.65.115) by NWD2HUBCAS7.ad.analog.com (10.64.69.107) with Microsoft SMTP Server id 14.3.408.0; Fri, 21 Jun 2019 08:14:18 -0400 From: Mircea Caprioru To: CC: , , , , , , , , Mircea Caprioru Subject: [PATCH V2 3/4] iio: adc: ad7124: Shift to dynamic allocation for channel configuration Date: Fri, 21 Jun 2019 15:13:43 +0300 Message-ID: <20190621121344.24917-3-mircea.caprioru@analog.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190621121344.24917-1-mircea.caprioru@analog.com> References: <20190621121344.24917-1-mircea.caprioru@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.57;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(396003)(376002)(346002)(39860400002)(136003)(2980300002)(54534003)(199004)(189003)(336012)(77096007)(2351001)(86362001)(186003)(246002)(106002)(70206006)(70586007)(47776003)(5660300002)(316002)(16586007)(1076003)(26005)(7636002)(305945005)(2906002)(4326008)(7696005)(76176011)(8676002)(356004)(50466002)(6666004)(6916009)(107886003)(51416003)(8936002)(14444005)(476003)(126002)(486006)(426003)(54906003)(2616005)(446003)(478600001)(50226002)(11346002)(36756003)(48376002)(44832011)(72206003);DIR:OUT;SFP:1101;SCL:1;SRVR:BL2PR03MB547;H:nwd2mta2.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail11.analog.com;A:1;MX:1; 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This will ensure a more flexibility for compatible devices. Ex. ad7124-4 - can have 4 differential or 8 pseudo-differential channels ad7124-8 - can have 8 differential or 16 pseudo-differential channels Also the device can suspport any other combination of differential and pseudo-differential channels base on the physical number of inputs available. Signed-off-by: Mircea Caprioru --- Changelog v2: - nothing changed here drivers/iio/adc/ad7124.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index ab52c5e9ecb1..edc6f1cc90b2 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -121,7 +121,7 @@ struct ad7124_channel_config { struct ad7124_state { const struct ad7124_chip_info *chip_info; struct ad_sigma_delta sd; - struct ad7124_channel_config channel_config[4]; + struct ad7124_channel_config *channel_config; struct regulator *vref[4]; struct clk *mclk; unsigned int adc_control; @@ -439,6 +439,7 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev, struct ad7124_state *st = iio_priv(indio_dev); struct device_node *child; struct iio_chan_spec *chan; + struct ad7124_channel_config *chan_config; unsigned int ain[2], channel = 0, tmp; int ret; @@ -453,8 +454,14 @@ static int ad7124_of_parse_channel_config(struct iio_dev *indio_dev, if (!chan) return -ENOMEM; + chan_config = devm_kcalloc(indio_dev->dev.parent, st->num_channels, + sizeof(*chan_config), GFP_KERNEL); + if (!chan_config) + return -ENOMEM; + indio_dev->channels = chan; indio_dev->num_channels = st->num_channels; + st->channel_config = chan_config; for_each_available_child_of_node(np, child) { ret = of_property_read_u32(child, "reg", &channel);