From patchwork Thu Feb 20 15:03:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandru Ardelean X-Patchwork-Id: 11394273 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9E73A92A for ; Thu, 20 Feb 2020 15:00:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 87B7A20679 for ; Thu, 20 Feb 2020 15:00:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728451AbgBTPAm (ORCPT ); Thu, 20 Feb 2020 10:00:42 -0500 Received: from mx0a-00128a01.pphosted.com ([148.163.135.77]:32228 "EHLO mx0a-00128a01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727761AbgBTPAl (ORCPT ); Thu, 20 Feb 2020 10:00:41 -0500 Received: from pps.filterd (m0167089.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01KEhvIr010963; Thu, 20 Feb 2020 10:00:39 -0500 Received: from nwd2mta4.analog.com ([137.71.173.58]) by mx0a-00128a01.pphosted.com with ESMTP id 2y8ucu4ekm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Feb 2020 10:00:39 -0500 Received: from ASHBMBX8.ad.analog.com (ashbmbx8.ad.analog.com [10.64.17.5]) by nwd2mta4.analog.com (8.14.7/8.14.7) with ESMTP id 01KF0cLb001162 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=FAIL); Thu, 20 Feb 2020 10:00:38 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 20 Feb 2020 10:00:37 -0500 Received: from zeus.spd.analog.com (10.64.82.11) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 20 Feb 2020 10:00:37 -0500 Received: from saturn.ad.analog.com ([10.48.65.124]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 01KF0UqA025958; Thu, 20 Feb 2020 10:00:34 -0500 From: Alexandru Ardelean To: , , CC: , , Alexandru Ardelean Subject: [PATCH 3/5] dt-bindings: iio: adc: add bindings doc for AXI ADC driver Date: Thu, 20 Feb 2020 17:03:15 +0200 Message-ID: <20200220150317.1864-3-alexandru.ardelean@analog.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200220150317.1864-1-alexandru.ardelean@analog.com> References: <20200220150317.1864-1-alexandru.ardelean@analog.com> MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-20_04:2020-02-19,2020-02-20 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 suspectscore=0 mlxscore=0 clxscore=1015 phishscore=0 priorityscore=1501 mlxlogscore=999 lowpriorityscore=0 adultscore=0 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2001150001 definitions=main-2002200109 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org This change adds the bindings documentation for the AXI ADC driver. Signed-off-by: Alexandru Ardelean --- .../bindings/iio/adc/adi,axi-adc.yaml | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml diff --git a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml new file mode 100644 index 000000000000..a1c2630c6840 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AXI ADC IP core + +maintainers: + - Michael Hennerich + - Alexandru Ardelean + +description: | + Analog Devices Generic AXI ADC IP core for interfacing an ADC device + with a high speed serial (JESD204B/C) or source synchronous parallel + interface (LVDS/CMOS). + Usually, some other interface type (i.e SPI) is used as a control + interface for the actual ADC, while this IP core will interface + to the data-lines of the ADC and handle the streaming of data into + memory via DMA. + + https://wiki.analog.com/resources/fpga/docs/axi_adc_ip + +properties: + compatible: + enum: + - adi,axi-adc-10.0.a + + reg: + maxItems: 1 + + dmas: + description: + A reference to a DMA channel channel specifier. + maxItems: 1 + + dmas-names: + description: + The name of the DMA channel. + maxItems: 1 + + axi-adc-client: + description: + A reference to a the actual ADC to which this FPGA ADC interfaces to. + maxItems: 1 + +required: + - compatible + - dmas + - reg + - axi-adc-client + +additionalProperties: false + +examples: + - | + fpga_axi { + #address-cells = <1>; + #size-cells = <1>; + + axi-adc@44a00000 { + compatible = "adi,axi-adc-10.0.a"; + reg = <0x44a00000 0x10000>; + dmas = <&rx_dma 0>; + dma-names = "rx"; + + axi-adc-client = <&spi_adc>; + }; + }; +...