From patchwork Thu Nov 4 07:13:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwendal Grignou X-Patchwork-Id: 12602633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F00EC433FE for ; Thu, 4 Nov 2021 07:13:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 08CB861053 for ; Thu, 4 Nov 2021 07:13:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230152AbhKDHP5 (ORCPT ); Thu, 4 Nov 2021 03:15:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230261AbhKDHPz (ORCPT ); Thu, 4 Nov 2021 03:15:55 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5086CC061203 for ; Thu, 4 Nov 2021 00:13:16 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id s24so5831024plp.0 for ; Thu, 04 Nov 2021 00:13:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1ySYyicPxT1tLrE6blYA6L5MNw/7iwJOtFFZ34+T8y8=; b=JVr7prZAH3zb2OQLpydYc9WxIMGUMOF0VVjcgjJM4R+viDLgFCS8PT+zSw+dZryIdI 0KmgMaAyA8jQE+lKQHCjNELAXU5kAqd3NeaM7S9IvwZW/uN631lhmoJdxA8gWq7PRYlM K4AuVIncWL6GrlymmrK4ZV5HN0CUHZyO80GaQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1ySYyicPxT1tLrE6blYA6L5MNw/7iwJOtFFZ34+T8y8=; b=pfTdpd94V2rFIeHa1ReiphNejO00aRGXFGuOsj5YXAtJC7TMZLdMfdjUAluI3o3RBO Chp+M+cVyeiInjEJGqjM1w1pJEWP0OKPomEISc92fVFC4F5bBcGwqMWpmgwCTb+N14Kj IqZPKqep10ztAUwyXpQPyx8fDs9JKPqLbLQUpAQ5k4XLaWtubqN2fNUrct7ceN28cdUD 0Tu3iFnnIxVXlbwVuhzRmGDQ7FKeb4a6VVJ7D9yd2S86ukBjTdCTv+pcZ7ntTR92j070 uJ4QJDrU+l6W+3XHO+uY38vC5Rl0o63QOXsMAPbLXNDwjwbhcPvTKMBj81PD+gibpvK5 gizw== X-Gm-Message-State: AOAM5303vMfbVaYzWhHGD9W3FXt8xF9k+zjjpiEJKwCtt+q3TwrOGOMU e4H7NL9bc5p4rgaeFt5A4uqPcQ== X-Google-Smtp-Source: ABdhPJxRyqlCbssv0b/EOjg85vQks4EmpnwjA/TV/jTnpcqKAHrHxpkQmlcEXaWQLuQUGdbPqeHGAg== X-Received: by 2002:a17:90b:3511:: with SMTP id ls17mr9429875pjb.81.1636009995879; Thu, 04 Nov 2021 00:13:15 -0700 (PDT) Received: from localhost ([2620:15c:202:201:b129:c9aa:6634:6c4c]) by smtp.gmail.com with UTF8SMTPSA id m12sm3472135pjr.14.2021.11.04.00.13.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 04 Nov 2021 00:13:15 -0700 (PDT) From: Gwendal Grignou To: jic23@kernel.org, lars@metafoo.de, swboyd@chromium.org Cc: andy.shevchenko@gmail.com, linux-iio@vger.kernel.org, Gwendal Grignou Subject: [PATCH v2 4/5] dt-bindings: iio: Add sx9324 binding Date: Thu, 4 Nov 2021 00:13:02 -0700 Message-Id: <20211104071303.3604314-5-gwendal@chromium.org> X-Mailer: git-send-email 2.33.1.1089.g2158813163f-goog In-Reply-To: <20211104071303.3604314-1-gwendal@chromium.org> References: <20211104071303.3604314-1-gwendal@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Similar to SX9310, add biddings to setup sx9324 hardware properties. SX9324 is a little different, introduce 4 phases to be configured in 2 pairs over 3 antennas. Signed-off-by: Gwendal Grignou --- Changes in v2: - Fix interrupt documentation wording. .../iio/proximity/semtech,sx9324.yaml | 140 ++++++++++++++++++ 1 file changed, 140 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml new file mode 100644 index 0000000000000..2c060803632f3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/semtech,sx9310.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Semtech's SX9324 capacitive proximity sensor + +maintainers: + - Gwendal Grignou + - Daniel Campello + +description: | + Semtech's SX9324 proximity sensor. + +properties: + compatible: + enum: + - semtech,sx9324 + + reg: + maxItems: 1 + + interrupts: + description: + Generated by device to announce preceding read request has finished + and data is available or that a close/far proximity event has happened. + maxItems: 1 + + vdd-supply: + description: Main power supply + + svdd-supply: + description: Host interface power supply + + "#io-channel-cells": + const: 1 + + semtech,ph0-pin: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + Indicates how each CS pin is used during phase 0. + Each of the 3 pins have the following value - + 0 : unused (high impedance) + 1 : measured input + 2 : dynamic shield + 3 : grounded. + For instance, CS0 measured, CS1 shield and CS2 ground is [1, 2, 3] + items: + enum: [ 0, 1, 2, 3 ] + minItems: 3 + maxItems: 3 + + semtech,ph1-pin: + semtech,ph2-pin: + semtech,ph3-pin: + Same as ph0-pin + + semtech,resolution01 + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + description: + Capacitance measurement resolution. For phase 0 and 1. + Higher the number, higher the resolution. + default: 4 + + semtech,resolution23 + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + description: + Capacitance measurement resolution. For phase 2 and 3 + default: 4 + + semtech,startup-sensor: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + description: + Phase used for start-up proximity detection. + It is used when we enable a phase to remove static offset and measure + only capacitance changes introduced by the user. + + semtech,proxraw-strength01: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + default: 1 + description: + PROXRAW filter strength for phase 0 and 1. A value of 0 represents off,i + and other values represent 1-1/N. + + semtech,proxraw-strength23: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 1, 2, 3, 4, 5, 6, 7] + default: 1 + description: + PROXRAW filter strength for phase 2 and 3. A value of 0 represents off,i + and other values represent 1-1/N. + + semtech,avg-pos-strength: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [0, 16, 64, 128, 256, 512, 1024, 4294967295] + default: 16 + description: + Average positive filter strength. A value of 0 represents off and + UINT_MAX (4294967295) represents infinite. Other values + represent 1-1/N. + +required: + - compatible + - reg + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + proximity@28 { + compatible = "semtech,sx9310"; + reg = <0x28>; + interrupt-parent = <&pio>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW 5>; + vdd-supply = <&pp3300_a>; + svdd-supply = <&pp1800_prox>; + #io-channel-cells = <1>; + semtech,ph0-pin = <1, 2, 3>; + semtech,ph1-pin = <3, 2, 1>; + semtech,ph2-pin = <1, 2, 3>; + semtech,ph3-pin = <3, 2, 1>; + semtech,resolution01 = 2; + semtech,resolution23 = 2; + semtech,startup-sensor = <1>; + semtech,proxraw-strength01 = <2>; + semtech,proxraw-strength23 = <2>; + semtech,avg-pos-strength = <64>; + }; + };