diff mbox series

[3/8] counter: intel-qeb: Use container_of instead of struct counter_device::priv

Message ID 20211221104546.214066-4-u.kleine-koenig@pengutronix.de (mailing list archive)
State Handled Elsewhere
Headers show
Series counter: Remove struct counter_device::priv | expand

Commit Message

Uwe Kleine-König Dec. 21, 2021, 10:45 a.m. UTC 
Using counter->priv is a memory read and so more expensive than
container_of which is only an addition. (In this case even a noop
because the offset is 0.)

So container_of is expected to be a tad faster, it's type-safe, and
produces smaller code (ARCH=arm allmodconfig):

	add/remove: 0/0 grow/shrink: 0/10 up/down: 0/-116 (-116)
	Function                                     old     new   delta
	intel_qep_spike_filter_ns_write              552     544      -8
	intel_qep_spike_filter_ns_read               252     240     -12
	intel_qep_probe                              692     680     -12
	intel_qep_preset_enable_write                276     264     -12
	intel_qep_preset_enable_read                 164     152     -12
	intel_qep_enable_write                       500     488     -12
	intel_qep_enable_read                         80      68     -12
	intel_qep_count_read                         140     128     -12
	intel_qep_ceiling_write                      260     248     -12
	intel_qep_ceiling_read                       140     128     -12
	Total: Before=4867, After=4751, chg -2.38%

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 drivers/counter/intel-qep.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)
diff mbox series

Patch

diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c
index 0924d16de6e2..168f8f5357cf 100644
--- a/drivers/counter/intel-qep.c
+++ b/drivers/counter/intel-qep.c
@@ -74,6 +74,11 @@  struct intel_qep {
 	u32 qepmax;
 };
 
+static inline struct intel_qep *intel_qep_from_counter(struct counter_device *counter)
+{
+	return container_of(counter, struct intel_qep, counter);
+}
+
 static inline u32 intel_qep_readl(struct intel_qep *qep, u32 offset)
 {
 	return readl(qep->regs + offset);
@@ -109,7 +114,7 @@  static void intel_qep_init(struct intel_qep *qep)
 static int intel_qep_count_read(struct counter_device *counter,
 				struct counter_count *count, u64 *val)
 {
-	struct intel_qep *const qep = counter->priv;
+	struct intel_qep *const qep = intel_qep_from_counter(counter);
 
 	pm_runtime_get_sync(qep->dev);
 	*val = intel_qep_readl(qep, INTEL_QEPCOUNT);
@@ -176,7 +181,7 @@  static struct counter_synapse intel_qep_count_synapses[] = {
 static int intel_qep_ceiling_read(struct counter_device *counter,
 				  struct counter_count *count, u64 *ceiling)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 
 	pm_runtime_get_sync(qep->dev);
 	*ceiling = intel_qep_readl(qep, INTEL_QEPMAX);
@@ -188,7 +193,7 @@  static int intel_qep_ceiling_read(struct counter_device *counter,
 static int intel_qep_ceiling_write(struct counter_device *counter,
 				   struct counter_count *count, u64 max)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	int ret = 0;
 
 	/* Intel QEP ceiling configuration only supports 32-bit values */
@@ -213,7 +218,7 @@  static int intel_qep_ceiling_write(struct counter_device *counter,
 static int intel_qep_enable_read(struct counter_device *counter,
 				 struct counter_count *count, u8 *enable)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 
 	*enable = qep->enabled;
 
@@ -223,7 +228,7 @@  static int intel_qep_enable_read(struct counter_device *counter,
 static int intel_qep_enable_write(struct counter_device *counter,
 				  struct counter_count *count, u8 val)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	u32 reg;
 	bool changed;
 
@@ -256,7 +261,7 @@  static int intel_qep_spike_filter_ns_read(struct counter_device *counter,
 					  struct counter_count *count,
 					  u64 *length)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	u32 reg;
 
 	pm_runtime_get_sync(qep->dev);
@@ -277,7 +282,7 @@  static int intel_qep_spike_filter_ns_write(struct counter_device *counter,
 					   struct counter_count *count,
 					   u64 length)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	u32 reg;
 	bool enable;
 	int ret = 0;
@@ -326,7 +331,7 @@  static int intel_qep_preset_enable_read(struct counter_device *counter,
 					struct counter_count *count,
 					u8 *preset_enable)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	u32 reg;
 
 	pm_runtime_get_sync(qep->dev);
@@ -341,7 +346,7 @@  static int intel_qep_preset_enable_read(struct counter_device *counter,
 static int intel_qep_preset_enable_write(struct counter_device *counter,
 					 struct counter_count *count, u8 val)
 {
-	struct intel_qep *qep = counter->priv;
+	struct intel_qep *qep = intel_qep_from_counter(counter);
 	u32 reg;
 	int ret = 0;
 
@@ -429,7 +434,6 @@  static int intel_qep_probe(struct pci_dev *pci, const struct pci_device_id *id)
 	qep->counter.num_counts = ARRAY_SIZE(intel_qep_counter_count);
 	qep->counter.signals = intel_qep_signals;
 	qep->counter.num_signals = ARRAY_SIZE(intel_qep_signals);
-	qep->counter.priv = qep;
 	qep->enabled = false;
 
 	pm_runtime_put(dev);