diff mbox series

[1/7] iio: sx9324: Fix register field spelling

Message ID 20220315173042.1325858-2-gwendal@chromium.org (mailing list archive)
State Changes Requested
Headers show
Series Add settings for precharge and internal resistor | expand

Commit Message

Gwendal Grignou March 15, 2022, 5:30 p.m. UTC
Field for PROX_CTRL4 should contain PROX_CTRL4.

Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
---
 drivers/iio/proximity/sx9324.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Stephen Boyd March 15, 2022, 6:19 p.m. UTC | #1
Quoting Gwendal Grignou (2022-03-15 10:30:36)
> Field for PROX_CTRL4 should contain PROX_CTRL4.
>
> Signed-off-by: Gwendal Grignou <gwendal@chromium.org>

Any Fixes tag? It's a typo though so not really a big deal.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Gwendal Grignou March 16, 2022, 9:38 p.m. UTC | #2
On Tue, Mar 15, 2022 at 11:19 AM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Gwendal Grignou (2022-03-15 10:30:36)
> > Field for PROX_CTRL4 should contain PROX_CTRL4.
> >
> > Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
>
> Any Fixes tag? It's a typo though so not really a big deal.
Fixes: 4c18a890dff8d ("iio:proximity:sx9324: Add SX9324 support")
>
> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff mbox series

Patch

diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c
index 0d9bbbb50cb45..1bef16437aa84 100644
--- a/drivers/iio/proximity/sx9324.c
+++ b/drivers/iio/proximity/sx9324.c
@@ -89,7 +89,7 @@ 
 #define SX9324_REG_PROX_CTRL4_AVGNEGFILT_MASK	GENMASK(5, 3)
 #define SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 0x08
 #define SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK	GENMASK(2, 0)
-#define SX9324_REG_PROX_CTRL3_AVGPOS_FILT_256 0x04
+#define SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256 0x04
 #define SX9324_REG_PROX_CTRL5		0x35
 #define SX9324_REG_PROX_CTRL5_HYST_MASK			GENMASK(5, 4)
 #define SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK	GENMASK(3, 2)
@@ -792,7 +792,7 @@  static const struct sx_common_reg_default sx9324_default_regs[] = {
 	{ SX9324_REG_PROX_CTRL3, SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES |
 		SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K },
 	{ SX9324_REG_PROX_CTRL4, SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 |
-		SX9324_REG_PROX_CTRL3_AVGPOS_FILT_256 },
+		SX9324_REG_PROX_CTRL4_AVGPOS_FILT_256 },
 	{ SX9324_REG_PROX_CTRL5, 0x00 },
 	{ SX9324_REG_PROX_CTRL6, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 },
 	{ SX9324_REG_PROX_CTRL7, SX9324_REG_PROX_CTRL6_PROXTHRESH_32 },