| Message ID | 20220419142458.884933-3-gengcixi@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | iio: adc: sc27xx: adjust structure and add PMIC's support | expand |
On Tue, 19 Apr 2022 22:24:53 +0800 Cixi Geng <gengcixi@gmail.com> wrote: > From: Cixi Geng <cixi.geng1@unisoc.com> > > Fix wrong configuration value of SC27XX_ADC_SCALE_MASK and > SC27XX_ADC_SCALE_SHIFT by spec documetation. > Fixes: 5df362a6cf49c (iio: adc: Add Spreadtrum SC27XX PMICs ADC support) No blank line here. Fixes tag is part of the main tag block and some of the automation people use doesn't cope with blank lines in that block. If nothing else comes up in reviewing the rest of the series I'll tidy that up whilst applying. Thanks, Jonathan > > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> > Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> > --- > drivers/iio/adc/sc27xx_adc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c > index 00098caf6d9e..aee076c8e2b1 100644 > --- a/drivers/iio/adc/sc27xx_adc.c > +++ b/drivers/iio/adc/sc27xx_adc.c > @@ -36,8 +36,8 @@ > > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) > -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) > -#define SC27XX_ADC_SCALE_SHIFT 8 > +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) > +#define SC27XX_ADC_SCALE_SHIFT 9 > > /* Bits definitions for SC27XX_ADC_INT_EN registers */ > #define SC27XX_ADC_IRQ_EN BIT(0)
diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index 00098caf6d9e..aee076c8e2b1 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -36,8 +36,8 @@ /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) -#define SC27XX_ADC_SCALE_SHIFT 8 +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) +#define SC27XX_ADC_SCALE_SHIFT 9 /* Bits definitions for SC27XX_ADC_INT_EN registers */ #define SC27XX_ADC_IRQ_EN BIT(0)