From patchwork Tue May 3 08:58:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12835317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E24CC433EF for ; Tue, 3 May 2022 08:54:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231902AbiECI6M (ORCPT ); Tue, 3 May 2022 04:58:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230464AbiECI6M (ORCPT ); Tue, 3 May 2022 04:58:12 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7EA0235ABF for ; Tue, 3 May 2022 01:54:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id E051ECE1E6A for ; Tue, 3 May 2022 08:54:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 01184C385B0; Tue, 3 May 2022 08:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651568077; bh=jPaTbN7zS3YqH2CKXzG9E3+WEnIfp3lOcul6gklYLl8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JHGtynp3Bs1GncFswKjB12h4k07/idCwyBlQUn9HBQ9dydYx8/m8O8hEKaIgRY467 n2d4S1VghSkkOSn0XieDHoNdG811A/EQe8ow2nso4QyJZdb+T6fRMWYvVBLPCdltQh lxvOWB4NsgIVdmRcJBDnHUDVkEDQcaYlDJAvMjMNm1I8u0ZA6DZbUXoj3L8B1bFxXg 6s7mkVX9+52tn/NqzfCOtDV11dwAHTY14H6Yj5yzhsLgAgtkKSDgFz2M3ulGVnNUlg GpLmYBC6TRBf0CPNU6Cip5sMt3JpBx4miqmr87uR2v57XGyJigbA0a/5mO922hMYBM 47caHHymDnhHw== From: Jonathan Cameron To: linux-iio@vger.kernel.org Cc: Akinobu Mita , Alexandru Lazar , Alexandru Tachici , Antoniu Miclaus , Charles-Antoine Couret , Cosmin Tanislav , Cristian Pop , David Lechner , Ivan Mikhaylov , Jacopo Mondi , Jean-Baptiste Maneyrol , Lars-Peter Clausen , Marcelo Schmitt , =?utf-8?q?M=C3=A5rten_Lindahl?= , Matt Ranostay , Michael Hennerich , Michael Welling , Mugilraj Dhavachelvan , Navin Sankar Velliangiri , =?utf-8?q?Nuno_S=C3=A1?= , Paul Cercueil , Phil Reid , Puranjay Mohan , Ricardo Ribalda , Robert Jones , Rui Miguel Silva , Sean Nyekjaer , Tomas Melin , Tomislav Denis , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Cameron Subject: [PATCH 18/92] iio: adc: ad7923: Fix alignment for DMA safety Date: Tue, 3 May 2022 09:58:21 +0100 Message-Id: <20220503085935.1533814-19-jic23@kernel.org> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220503085935.1533814-1-jic23@kernel.org> References: <20220503085935.1533814-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_ALIGN definition. Update the comment to include 'may'. Note that some other fixes have applied to this line of code that may complicate automated backporting. Signed-off-by: Jonathan Cameron Fixes: 0eac259db28f ("IIO ADC support for AD7923") --- drivers/iio/adc/ad7923.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad7923.c b/drivers/iio/adc/ad7923.c index 069b561ee768..596244bccd20 100644 --- a/drivers/iio/adc/ad7923.c +++ b/drivers/iio/adc/ad7923.c @@ -57,12 +57,12 @@ struct ad7923_state { unsigned int settings; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. * Ensure rx_buf can be directly used in iio_push_to_buffers_with_timetamp * Length = 8 channels + 4 extra for 8 byte timestamp */ - __be16 rx_buf[12] ____cacheline_aligned; + __be16 rx_buf[12] __aligned(IIO_ALIGN); __be16 tx_buf[4]; };