From patchwork Tue May 3 08:58:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 12835329 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D1CC2C433EF for ; Tue, 3 May 2022 08:56:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233028AbiECJAB (ORCPT ); Tue, 3 May 2022 05:00:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229854AbiECJAB (ORCPT ); Tue, 3 May 2022 05:00:01 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2B4A36141 for ; Tue, 3 May 2022 01:56:29 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 411CB6126D for ; Tue, 3 May 2022 08:56:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97798C385B2; Tue, 3 May 2022 08:56:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651568188; bh=V1hoaQTCsdNE7BC6xp608amDLKMrFoZ5Gr763uAhcDQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MZ35NCVQlwMnluY0FbUDycjeix8/9yDK+HG6T3qEUddU20XqqlEWJsgiVFR89oFzk XikTvwd5BvRId+uWZw78fyRBwLS8QngCOznwLCyGSjQRc480e5nIXZVsUzD1Xh1aDH GTJ3dq2pzbEltIVsLivrKQzC8kCA6Kz4qyodhm0zIGDI/hEeDYXXTs6eG9CKCMpF5d 5e5+fBakIH0fr39gyU2Ux/KJPM3YuzA12E1Zxhbw4266p1ba/ncm5QdB4LtlAXvueP YtgQjlhhKvYvieFFamFm3JUJLAt1ADcUafO6SJ6RViVaPqx5ClA7TVajT+t7Q/wxPd rG/bCG4KLIR6w== From: Jonathan Cameron To: linux-iio@vger.kernel.org Cc: Akinobu Mita , Alexandru Lazar , Alexandru Tachici , Antoniu Miclaus , Charles-Antoine Couret , Cosmin Tanislav , Cristian Pop , David Lechner , Ivan Mikhaylov , Jacopo Mondi , Jean-Baptiste Maneyrol , Lars-Peter Clausen , Marcelo Schmitt , =?utf-8?q?M=C3=A5rten_Lindahl?= , Matt Ranostay , Michael Hennerich , Michael Welling , Mugilraj Dhavachelvan , Navin Sankar Velliangiri , =?utf-8?q?Nuno_S=C3=A1?= , Paul Cercueil , Phil Reid , Puranjay Mohan , Ricardo Ribalda , Robert Jones , Rui Miguel Silva , Sean Nyekjaer , Tomas Melin , Tomislav Denis , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Jonathan Cameron Subject: [PATCH 30/92] iio: adc: ti-adc108s102: Fix alignment for DMA safety Date: Tue, 3 May 2022 09:58:33 +0100 Message-Id: <20220503085935.1533814-31-jic23@kernel.org> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220503085935.1533814-1-jic23@kernel.org> References: <20220503085935.1533814-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Jonathan Cameron ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_ALIGN definition. Dual fixes tags as two cases that were introduced in different patches. One of those patches is a fix however and likely to have been backported to stable kernels. Fixes: 3691e5a69449 ("iio: adc: add driver for the ti-adc084s021 chip") Fixes: cbe5c6977604 ("iio: adc: ti-adc108s102: Fix alignment of buffer pushed to iio buffers.") Signed-off-by: Jonathan Cameron --- drivers/iio/adc/ti-adc108s102.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ti-adc108s102.c b/drivers/iio/adc/ti-adc108s102.c index c8e48881c37f..4307d87d5400 100644 --- a/drivers/iio/adc/ti-adc108s102.c +++ b/drivers/iio/adc/ti-adc108s102.c @@ -77,8 +77,8 @@ struct adc108s102_state { * tx_buf: 8 channel read commands, plus 1 dummy command * rx_buf: 1 dummy response, 8 channel responses */ - __be16 rx_buf[9] ____cacheline_aligned; - __be16 tx_buf[9] ____cacheline_aligned; + __be16 rx_buf[9] __aligned(IIO_ALIGN); + __be16 tx_buf[9] __aligned(IIO_ALIGN); }; #define ADC108S102_V_CHAN(index) \