| Message ID | 20220623170844.2189814-8-marcus.folkesson@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [01/10] iio: adc: mcp3911: correct "microchip,device-addr" property | expand |
On Thu, Jun 23, 2022 at 7:42 PM Marcus Folkesson <marcus.folkesson@gmail.com> wrote: > > The MCP3911 incorporates a phase delay generator, > which ensures that the two ADCs are converting the > inputs with a fixed delay between them. > Expose it to userspace. ... > + case IIO_CHAN_INFO_PHASE: > + if (val2 != 0 || val > 0xfff) { >= BIT(12) will show better the intention > + ret = -EINVAL; > + goto out; > + } ... > + ret = mcp3911_write(adc, MCP3911_REG_PHASE, val, > + 2); One line.
On Thu, Jun 23, 2022 at 09:07:21PM +0200, Andy Shevchenko wrote: > > + ret = mcp3911_write(adc, MCP3911_REG_PHASE, val, > > + 2); > > One line. Fixed > > -- > With Best Regards, > Andy Shevchenko Thanks, Marcus Folkesson
On Fri, 24 Jun 2022 14:02:22 +0200 Marcus Folkesson <marcus.folkesson@gmail.com> wrote: > On Thu, Jun 23, 2022 at 09:07:21PM +0200, Andy Shevchenko wrote: > > > + ret = mcp3911_write(adc, MCP3911_REG_PHASE, val, > > > + 2); > > > > One line. > > Fixed Hi Marcus, Grumpy maintainer moment: If you've accepted feedback don't send yet more email. Just have it incorporated in next version + in changes logs. It's on a few seconds for people to open each email, but it adds up over time! Jonathan > > > > > -- > > With Best Regards, > > Andy Shevchenko > > > Thanks, > Marcus Folkesson
diff --git a/drivers/iio/adc/mcp3911.c b/drivers/iio/adc/mcp3911.c index 9e365947d285..aefc5eac874c 100644 --- a/drivers/iio/adc/mcp3911.c +++ b/drivers/iio/adc/mcp3911.c @@ -155,6 +155,17 @@ static int mcp3911_read_raw(struct iio_dev *indio_dev, ret = IIO_VAL_INT; break; + + case IIO_CHAN_INFO_PHASE: + ret = mcp3911_read(adc, + MCP3911_REG_PHASE, val, 2); + if (ret) + goto out; + + *val = sign_extend32(*val, 12); + ret = IIO_VAL_INT; + break; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: ret = mcp3911_read(adc, MCP3911_REG_CONFIG, val, 2); @@ -225,6 +236,16 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, MCP3911_STATUSCOM_EN_OFFCAL, 2); break; + case IIO_CHAN_INFO_PHASE: + if (val2 != 0 || val > 0xfff) { + ret = -EINVAL; + goto out; + } + + /* Write phase */ + ret = mcp3911_write(adc, MCP3911_REG_PHASE, val, + 2); + break; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: switch (val) { case 4096: @@ -273,7 +294,9 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, .channel = idx, \ .scan_index = idx, \ .scan_index = idx, \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_type = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)| \ + BIT(IIO_CHAN_INFO_PHASE), \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT(IIO_CHAN_INFO_OFFSET) | \ BIT(IIO_CHAN_INFO_SCALE), \
The MCP3911 incorporates a phase delay generator, which ensures that the two ADCs are converting the inputs with a fixed delay between them. Expose it to userspace. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> --- drivers/iio/adc/mcp3911.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-)