Message ID | 20221214031503.3104251-2-carlos.song@nxp.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | iio: imu: fxos8700: fix bugs about ODR and changes for a good readability | expand |
On Wed, 14 Dec 2022 11:14:59 +0800 carlos.song@nxp.com wrote: > From: Carlos Song <carlos.song@nxp.com> > > The absence of a correct offset leads an incorrect ODR mode > readback after use a hexadecimal number to mark the value from > FXOS8700_CTRL_REG1. > > Get ODR mode by field mask and FIELD_GET clearly and conveniently. > > Fixes: 84e5ddd5c46e ("iio: imu: Add support for the FXOS8700 IMU") > Signed-off-by: Carlos Song <carlos.song@nxp.com> > You need a --- above the change log to avoid git picking it up when I apply the patch. I've fixed that up whilst applying. Applied to the fixes-togreg branch of iio.git and marked for stable. > Changes for V3: > - Rework commit log > > diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c > index 773f62203bf0..83ab7d0f79b3 100644 > --- a/drivers/iio/imu/fxos8700_core.c > +++ b/drivers/iio/imu/fxos8700_core.c > @@ -10,6 +10,7 @@ > #include <linux/regmap.h> > #include <linux/acpi.h> > #include <linux/bitops.h> > +#include <linux/bitfield.h> > > #include <linux/iio/iio.h> > #include <linux/iio/sysfs.h> > @@ -147,6 +148,7 @@ > #define FXOS8700_CTRL_ODR_MSK 0x38 > #define FXOS8700_CTRL_ODR_MAX 0x00 > #define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3) > +#define FXOS8700_CTRL_ODR_GENMSK GENMASK(5, 3) > > /* Bit definitions for FXOS8700_M_CTRL_REG1 */ > #define FXOS8700_HMS_MASK GENMASK(1, 0) > @@ -524,7 +526,7 @@ static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, > if (ret) > return ret; > > - val &= FXOS8700_CTRL_ODR_MSK; > + val = FIELD_GET(FXOS8700_CTRL_ODR_GENMSK, val); > > for (i = 0; i < odr_num; i++) > if (val == fxos8700_odr[i].bits)
On Fri, 23 Dec 2022 16:55:29 +0000 Jonathan Cameron <jic23@kernel.org> wrote: > On Wed, 14 Dec 2022 11:14:59 +0800 > carlos.song@nxp.com wrote: > > > From: Carlos Song <carlos.song@nxp.com> > > > > The absence of a correct offset leads an incorrect ODR mode > > readback after use a hexadecimal number to mark the value from > > FXOS8700_CTRL_REG1. > > > > Get ODR mode by field mask and FIELD_GET clearly and conveniently. > > > > Fixes: 84e5ddd5c46e ("iio: imu: Add support for the FXOS8700 IMU") > > Signed-off-by: Carlos Song <carlos.song@nxp.com> > > > You need a > --- > > above the change log to avoid git picking it up when I apply the patch. > I've fixed that up whilst applying. > > Applied to the fixes-togreg branch of iio.git and marked for stable. Dropped again because this makes no sense wrt to split of what is going on in patch 2. > > > Changes for V3: > > - Rework commit log > > > > diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c > > index 773f62203bf0..83ab7d0f79b3 100644 > > --- a/drivers/iio/imu/fxos8700_core.c > > +++ b/drivers/iio/imu/fxos8700_core.c > > @@ -10,6 +10,7 @@ > > #include <linux/regmap.h> > > #include <linux/acpi.h> > > #include <linux/bitops.h> > > +#include <linux/bitfield.h> > > > > #include <linux/iio/iio.h> > > #include <linux/iio/sysfs.h> > > @@ -147,6 +148,7 @@ > > #define FXOS8700_CTRL_ODR_MSK 0x38 > > #define FXOS8700_CTRL_ODR_MAX 0x00 > > #define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3) > > +#define FXOS8700_CTRL_ODR_GENMSK GENMASK(5, 3) > > > > /* Bit definitions for FXOS8700_M_CTRL_REG1 */ > > #define FXOS8700_HMS_MASK GENMASK(1, 0) > > @@ -524,7 +526,7 @@ static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, > > if (ret) > > return ret; > > > > - val &= FXOS8700_CTRL_ODR_MSK; > > + val = FIELD_GET(FXOS8700_CTRL_ODR_GENMSK, val); > > > > for (i = 0; i < odr_num; i++) > > if (val == fxos8700_odr[i].bits) >
diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c index 773f62203bf0..83ab7d0f79b3 100644 --- a/drivers/iio/imu/fxos8700_core.c +++ b/drivers/iio/imu/fxos8700_core.c @@ -10,6 +10,7 @@ #include <linux/regmap.h> #include <linux/acpi.h> #include <linux/bitops.h> +#include <linux/bitfield.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> @@ -147,6 +148,7 @@ #define FXOS8700_CTRL_ODR_MSK 0x38 #define FXOS8700_CTRL_ODR_MAX 0x00 #define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3) +#define FXOS8700_CTRL_ODR_GENMSK GENMASK(5, 3) /* Bit definitions for FXOS8700_M_CTRL_REG1 */ #define FXOS8700_HMS_MASK GENMASK(1, 0) @@ -524,7 +526,7 @@ static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, if (ret) return ret; - val &= FXOS8700_CTRL_ODR_MSK; + val = FIELD_GET(FXOS8700_CTRL_ODR_GENMSK, val); for (i = 0; i < odr_num; i++) if (val == fxos8700_odr[i].bits)