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Wed, 14 Dec 2022 03:14:40 +0000 From: carlos.song@nxp.com To: jic23@kernel.org, lars@metafoo.de Cc: rjones@gateworks.com, Jonathan.Cameron@huawei.com, haibo.chen@nxp.com, carlos.song@nxp.com, linux-imx@nxp.com, linux-iio@vger.kernel.org Subject: [PATCH v3 2/5] iio: imu: fxos8700: improve readability by field mask and regmap_write Date: Wed, 14 Dec 2022 11:15:00 +0800 Message-Id: <20221214031503.3104251-3-carlos.song@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221214031503.3104251-1-carlos.song@nxp.com> References: <20221214031503.3104251-1-carlos.song@nxp.com> X-ClientProxiedBy: SI1PR02CA0037.apcprd02.prod.outlook.com (2603:1096:4:1f6::13) To VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR04MB5005:EE_|AM8PR04MB7761:EE_ X-MS-Office365-Filtering-Correlation-Id: 767f16ec-2f1d-47f6-4e56-08dadd8156ea X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: S/eUDgot67dvtRX8o5c9mPvXi/WEW5ZBHdC7zM/bFPLtVJGmbN52gBRJZhKji21aM6Jg4gddO9D2hksijIv5dn5TIUBU7ZZLAUoEZg4vXWHDrHB7ewe95aeqXDiFV9RHtdXA973IEfVffqRhbW9C7OJ/CuRf6Vc7jiofx94tclnS2n4cwoQTZXFpDNtHfddp3PBM9AbF1jJn1u09SCZ2VkJ7/1KLJSbHTIb822IHfMiQWpi9KvkrQGup/uXF9XeZLCK94Ur2eZVo7t1kMFintDU49E0guKIuam8DXTDFuLSRQVsKV9LdcakQzC6vqKn4uatiAUXl46fGehc/QgqcxYaCSBGVLJwwwPQ83muru6J9G6ugR1fgZ6I2cUtyfoGPsVroVsYf1UAsIyOxBwhNAPzpuuHBX84mbnvUELGfEGuZOOssKA8ABustUNYTgn7MBfcYFKNbg34/DhcfJej43qgyjtxNs+sH3GhWgy5ryZXRW5veUoPliWugHWbs8FlqiFpLOOiOD6J+ThbtdKzkM8fZ7Q89+ZHLRvbpPPhE7m8eSuZe8MRn0d8pn4IAZTG6hqOiBRnF3s1N2E7GYrgoVh0ID0EeVwpgLZji2sCaCV6yfFfNmjLRr0Kmr06nKFZdQLvmy+kkSI65kfoqaKevReGMqpJXA/Syylob+GPKWLNVuHziLTceKlRKaqc3EMZeelXjez0rHymBxbWvvwUCkhDkFAOpXVxM1S0zddrNciF1EmsURxV/siseH9wHzOumCk6XrvK3mzwNjWXQGO1W5g8BDdyyRM0Z6xZMjj9tmOfRHKf+xufz3t0qqEYPfS0bWZjMZG5Xxb/2H6HWQuloM5Fo+uIjiCUFsNd5g4W+67DFj15zoTUBSFSakXGmblSDN+F8ND3CTEvMAlqRz8FyWJlvyxd0ZZEa1CPlnHt0CmwJGabWayZ6dgflPLUMECusC+YuR5B0zQdtZIB0zAJu9k/C2bwWaYmA0zneqBzBkMvfxAYW9YQyNIoAaE3p60sCiJkfJtnRsWscu6Q1TsRAYsWMaxf7zQDtATCm6WIj9R4Of0Z7tZzDIhrpgEIMwrkz5FV6TTJJfes8PdWWln1y8QW1u4Rdeqe3CLt9eXywh1mzlh5aEUAPDLL8ylph1oysVUeqX7nsfYopUJBwX+TB1iYXmBvCxlHATgugJ8cFMU8MXEvbfNUczErK+4Md2IJksWzzwTldM57L3O1WO2jMikwdu3S1cVSzSjpcUKiWZCOAVReN7Jo7p21T9sfUWE3raVY1IEhGA52HrplVs1A6Bh0lNAa4PJxuZcnVYp0vUxklQfTSdWNmtJYh7tjQqqN1Yd08B+gG4Vve/oaGPgcByKWcAbD5n2d4GzC7QUJqLhW8t3249bsxGZ2Jdf8PsJsC1/kyB6zBMG2QzIbchsSMsFUl60JVUBWnnJ3eT8+dKUJfGwncTm6x3rReCq/qO3JX3hzmk07jVbo0MmSQRNJwJW67gVp1Og03yV3kTTJ3rXZnvud/c0Ia09XowAMJeMet2xHR+VOSzi7cyK4ySO8+fKPdGU5UxQwnrb79h8sJs/a/o8H/a/Obn7EfKIc/6pTj X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 767f16ec-2f1d-47f6-4e56-08dadd8156ea X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5005.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Dec 2022 03:14:40.7562 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: TAs281tfWmqAJ/jSk6pxLeNjATEcmT11DKuTPGn+9DIP7XdH3Jg8FqCor2dCp2fpMbYTZJqNjMif5rBOry+GZg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB7761 Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org From: Carlos Song FXOS8700_CTRL_ODR_MSK is a hex digit mask and FXOS8700_CTRL_ODR_GENMSK is a field mask. They have a similar function. And mixing regmap_write and regmap_update_bits isn't good for readability. Remove FXOS8700_CTRL_ODR_GENMSK and set FXOS8700_CTRL_ODR_MSK a field mask definition with a synchronous change. Use regmap_write() instead of regmap_update_bits() to update bits. They are good for readability. Fixes: 84e5ddd5c46e ("iio: imu: Add support for the FXOS8700 IMU") Signed-off-by: Carlos Song Changes for V3: - Remove FXOS8700_CTRL_ODR_GENMSK and set FXOS8700_CTRL_ODR_MSK a field mask. - Legal use of filed mask and FIELD_PREP() to select ODR mode - Rework commit log diff --git a/drivers/iio/imu/fxos8700_core.c b/drivers/iio/imu/fxos8700_core.c index 83ab7d0f79b3..a1af5d0fde5d 100644 --- a/drivers/iio/imu/fxos8700_core.c +++ b/drivers/iio/imu/fxos8700_core.c @@ -145,10 +145,9 @@ #define FXOS8700_NVM_DATA_BNK0 0xa7 /* Bit definitions for FXOS8700_CTRL_REG1 */ -#define FXOS8700_CTRL_ODR_MSK 0x38 #define FXOS8700_CTRL_ODR_MAX 0x00 #define FXOS8700_CTRL_ODR_MIN GENMASK(4, 3) -#define FXOS8700_CTRL_ODR_GENMSK GENMASK(5, 3) +#define FXOS8700_CTRL_ODR_MSK GENMASK(5, 3) /* Bit definitions for FXOS8700_M_CTRL_REG1 */ #define FXOS8700_HMS_MASK GENMASK(1, 0) @@ -510,10 +509,8 @@ static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t, if (i >= odr_num) return -EINVAL; - return regmap_update_bits(data->regmap, - FXOS8700_CTRL_REG1, - FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE, - fxos8700_odr[i].bits << 3 | active_mode); + val = val | FIELD_PREP(FXOS8700_CTRL_ODR_MSK, fxos8700_odr[i].bits) | active_mode; + return regmap_write(data->regmap, FXOS8700_CTRL_REG1, val); } static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, @@ -526,7 +523,7 @@ static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t, if (ret) return ret; - val = FIELD_GET(FXOS8700_CTRL_ODR_GENMSK, val); + val = FIELD_GET(FXOS8700_CTRL_ODR_MSK, val); for (i = 0; i < odr_num; i++) if (val == fxos8700_odr[i].bits)