[1/2] dt-bindings: iio: adc: adding MCP3564 ADC

Commit Message

[e-mail] May 19, 2023, 4:01 p.m. UTC

From: Marius Cristea <[e-mail]>

This is the device tree schema for iio driver for
Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
Delta-Sigma ADCs with an SPI interface.

Signed-off-by: Marius Cristea <[e-mail]>
---
 .../bindings/iio/adc/microchip,mcp3564.yaml   | 88 +++++++++++++++++++
 1 file changed, 88 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml

Comments

Conor Dooley May 19, 2023, 6:29 p.m. UTC | #1

Hey Marius,

On Fri, May 19, 2023 at 07:01:44PM +0300, [e-mail] wrote:
> From: Marius Cristea <[e-mail]>
> 
> This is the device tree schema for iio driver for
> Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> Delta-Sigma ADCs with an SPI interface.

Just one quick process bit, please try to CC all of the maintainers
listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
vendor tree?

> Signed-off-by: Marius Cristea <[e-mail]>
> ---

> +  vref-supply:
> +    description:
> +      Some devices have a specific reference voltage supplied on a different
> +      pin to the other supplies. Needed to be able to establish channel scaling
> +      unless there is also an internal reference available (e.g. mcp3564r)

Should this be marked as a required property for the non-r devices that
do not have an internal reference?

> +  microchip,hw-device-address:

Hopefully Rob or Jonathan etc can chime in as to whether a common
property exists for this type of thing...

> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    description:
> +      The address is set on a per-device basis by fuses in the factory,
> +      configured on request. If not requested, the fuses are set for 0x1.
> +      The device address is part of the device markings to avoid
> +      potential confusion. This address is coded on two bits, so four possible
> +      addresses are available when multiple devices are present on the same
> +      SPI bus with only one Chip Select line for all devices.

..although if it doesn't, it'd be good, I think, to add here where the
property crops up in spi transfers. And if not in the description, in
the commit message instead?

Thanks,
Conor.

Jonathan Cameron May 20, 2023, 1:20 p.m. UTC | #2

On Fri, 19 May 2023 19:01:44 +0300
<[e-mail]> wrote:

> From: Marius Cristea <[e-mail]>
> 
> This is the device tree schema for iio driver for
> Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> Delta-Sigma ADCs with an SPI interface.
> 
> Signed-off-by: Marius Cristea <[e-mail]>

Hi Marius,

A few comments inline 
> ---
>  .../bindings/iio/adc/microchip,mcp3564.yaml   | 88 +++++++++++++++++++
>  1 file changed, 88 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> new file mode 100644
> index 000000000000..407a125e3776
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip MCP346X and MCP356X ADC Family
> +
> +maintainers:
> +  - Marius Cristea <[e-mail]>
> +
> +description: |
> +   Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> +   Delta-Sigma ADCs with an SPI interface.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - microchip,mcp3461
> +      - microchip,mcp3462
> +      - microchip,mcp3464
> +      - microchip,mcp3461r
> +      - microchip,mcp3462r
> +      - microchip,mcp3464r
> +      - microchip,mcp3561
> +      - microchip,mcp3562
> +      - microchip,mcp3564
> +      - microchip,mcp3561r
> +      - microchip,mcp3562r
> +      - microchip,mcp3564r
> +
> +  reg:
> +    maxItems: 1
> +
> +  spi-max-frequency: true
If there is a device constraint on this (normally is) then good to enforce it
from the binding.  Naturally wiring / host side limits may constrain it more.

> +
> +  spi-cpha: true
> +
> +  spi-cpol: true
> +
> +  vref-supply:
> +    description:
> +      Some devices have a specific reference voltage supplied on a different
> +      pin to the other supplies. Needed to be able to establish channel scaling
> +      unless there is also an internal reference available (e.g. mcp3564r)
> +

From a quick glance at a random datasheet, looks like there additional power supplies
that should be required.

If this is required for some devices, I'd expect to see the binding enforce
that with some required entries conditioned on the compatibles rather than as
documentation. If there are devices where it isn't even optional then the binding
should enforce that as well.

> +  microchip,hw-device-address:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    description:
> +      The address is set on a per-device basis by fuses in the factory,
> +      configured on request. If not requested, the fuses are set for 0x1.
> +      The device address is part of the device markings to avoid
> +      potential confusion. This address is coded on two bits, so four possible
> +      addresses are available when multiple devices are present on the same
> +      SPI bus with only one Chip Select line for all devices.
> +
> +  "#io-channel-cells":
> +    const: 1
> +
> +dependencies:
> +  spi-cpol: [ spi-cpha ]
> +  spi-cpha: [ spi-cpol ]
> +
> +required:
> +  - compatible
> +  - microchip,hw-device-address
Supplies should also be required (unless optional like vref seems to sometimes
be for these parts - where it's required I expect the binding to enforce that.)
> +
> +additionalProperties: false
For SPI devices, the newer way of providing standard SPI properties is:

allOf:
  - $ref: /schemas/spi/spi-peripheral-props.yaml#

unevaluatedProperties: false

https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml#L33
for example

> +
> +examples:
> +  - |
> +    spi {
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        adc@0 {
> +            compatible = "microchip,mcp3564r";
> +            reg = <0>;
> +            vref-supply = <&vref_reg>;
> +            spi-cpha;
> +            spi-cpol;
> +            spi-max-frequency = <10000000>;
> +            microchip,hw-device-address = <1>;
> +        };
> +    };
> +...

Jonathan Cameron May 20, 2023, 3:17 p.m. UTC | #3

On Fri, 19 May 2023 19:29:15 +0100
Conor Dooley <[e-mail]> wrote:

> Hey Marius,
> 
> On Fri, May 19, 2023 at 07:01:44PM +0300, [e-mail] wrote:
> > From: Marius Cristea <[e-mail]>
> > 
> > This is the device tree schema for iio driver for
> > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > Delta-Sigma ADCs with an SPI interface.  
> 
> Just one quick process bit, please try to CC all of the maintainers
> listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
> 3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
> vendor tree?
> 
> > Signed-off-by: Marius Cristea <[e-mail]>
> > ---  
> 
> > +  vref-supply:
> > +    description:
> > +      Some devices have a specific reference voltage supplied on a different
> > +      pin to the other supplies. Needed to be able to establish channel scaling
> > +      unless there is also an internal reference available (e.g. mcp3564r)  
> 
> Should this be marked as a required property for the non-r devices that
> do not have an internal reference?
> 
> > +  microchip,hw-device-address:  
> 
> Hopefully Rob or Jonathan etc can chime in as to whether a common
> property exists for this type of thing...
> 
Nope. This is a new one for me - there are devices that work on a daisy chain
principle but I think this one works by encoding stuff in the actual message
which is unusual for SPI.

> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    minimum: 0
> > +    maximum: 3
> > +    description:
> > +      The address is set on a per-device basis by fuses in the factory,
> > +      configured on request. If not requested, the fuses are set for 0x1.
> > +      The device address is part of the device markings to avoid
> > +      potential confusion. This address is coded on two bits, so four possible
> > +      addresses are available when multiple devices are present on the same
> > +      SPI bus with only one Chip Select line for all devices.  
> 
> ..although if it doesn't, it'd be good, I think, to add here where the
> property crops up in spi transfers. And if not in the description, in
> the commit message instead?
Agreed.  Top two bits of COMMAND BYTE which is first one on the wire I think.

Thanks,

J
> 
> Thanks,
> Conor.
>

Mike Looijmans May 24, 2023, 10:37 a.m. UTC | #4

On 19-05-2023 18:01, [e-mail] wrote:
> From: Marius Cristea <[e-mail]>
> 
> This is the device tree schema for iio driver for
> Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> Delta-Sigma ADCs with an SPI interface.
> 
> Signed-off-by: Marius Cristea <[e-mail]>
> ---
>   .../bindings/iio/adc/microchip,mcp3564.yaml   | 88 +++++++++++++++++++
>   1 file changed, 88 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> new file mode 100644
> index 000000000000..407a125e3776
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> @@ -0,0 +1,88 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip MCP346X and MCP356X ADC Family
> +
> +maintainers:
> +  - Marius Cristea <[e-mail]>
> +
> +description: |
> +   Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> +   Delta-Sigma ADCs with an SPI interface.
> +
> +properties:
> +  compatible:
> +    enum:
> +      - microchip,mcp3461
> +      - microchip,mcp3462
> +      - microchip,mcp3464
> +      - microchip,mcp3461r
> +      - microchip,mcp3462r
> +      - microchip,mcp3464r
> +      - microchip,mcp3561
> +      - microchip,mcp3562
> +      - microchip,mcp3564
> +      - microchip,mcp3561r
> +      - microchip,mcp3562r
> +      - microchip,mcp3564r
> +
> +  reg:
> +    maxItems: 1
> +
> +  spi-max-frequency: true
> +
> +  spi-cpha: true
> +
> +  spi-cpol: true
> +
> +  vref-supply:
> +    description:
> +      Some devices have a specific reference voltage supplied on a different
> +      pin to the other supplies. Needed to be able to establish channel scaling
> +      unless there is also an internal reference available (e.g. mcp3564r)
> +
> +  microchip,hw-device-address:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 3
> +    description:
> +      The address is set on a per-device basis by fuses in the factory,
> +      configured on request. If not requested, the fuses are set for 0x1.
> +      The device address is part of the device markings to avoid
> +      potential confusion. This address is coded on two bits, so four possible
> +      addresses are available when multiple devices are present on the same
> +      SPI bus with only one Chip Select line for all devices.
> +
> +  "#io-channel-cells":

That's a typo, "io" should be "iio", right?


> +    const: 1
> +
> +dependencies:
> +  spi-cpol: [ spi-cpha ]
> +  spi-cpha: [ spi-cpol ]
> +
> +required:
> +  - compatible
> +  - microchip,hw-device-address

Should be optional, as the default "1" is going to be what most people will be 
using.

> +
> +additionalProperties: false

Missing properties:

- Interrupt (even though the driver doesn't use it yet)
- push-pull or open-drain config of interrupt pin
- dvdd-supply
- avdd-supply

I suggest using this:

+  clocks:
+    description:
+      Phandle and clock identifier for external sampling clock.
+      If not specified, the internal crystal oscillator will be used.
+    maxItems: 1
+
+  interrupts:
+    description: IRQ line of the ADC
+    maxItems: 1
+
+  drive-open-drain:
+    description:
+      Whether to drive the IRQ signal as push-pull (default) or open-drain. Note
+      that the device requires this pin to become "high", otherwise it will stop
+      converting.
+    type: boolean


> +
> +examples:
> +  - |
> +    spi {
> +        #address-cells = <1>;
> +        #size-cells = <0>;
> +
> +        adc@0 {
> +            compatible = "microchip,mcp3564r";
> +            reg = <0>;
> +            vref-supply = <&vref_reg>;
> +            spi-cpha;
> +            spi-cpol;
> +            spi-max-frequency = <10000000>;
> +            microchip,hw-device-address = <1>;
> +        };
> +    };
> +...

Jonathan Cameron May 28, 2023, 7:16 p.m. UTC | #5

On Wed, 24 May 2023 12:37:43 +0200
Mike Looijmans <[e-mail]> wrote:

> On 19-05-2023 18:01, [e-mail] wrote:
> > From: Marius Cristea <[e-mail]>
> > 
> > This is the device tree schema for iio driver for
> > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > Delta-Sigma ADCs with an SPI interface.
> > 
> > Signed-off-by: Marius Cristea <[e-mail]>
> > ---
> >   .../bindings/iio/adc/microchip,mcp3564.yaml   | 88 +++++++++++++++++++
> >   1 file changed, 88 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> > new file mode 100644
> > index 000000000000..407a125e3776
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
> > @@ -0,0 +1,88 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Microchip MCP346X and MCP356X ADC Family
> > +
> > +maintainers:
> > +  - Marius Cristea <[e-mail]>
> > +
> > +description: |
> > +   Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > +   Delta-Sigma ADCs with an SPI interface.
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - microchip,mcp3461
> > +      - microchip,mcp3462
> > +      - microchip,mcp3464
> > +      - microchip,mcp3461r
> > +      - microchip,mcp3462r
> > +      - microchip,mcp3464r
> > +      - microchip,mcp3561
> > +      - microchip,mcp3562
> > +      - microchip,mcp3564
> > +      - microchip,mcp3561r
> > +      - microchip,mcp3562r
> > +      - microchip,mcp3564r
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  spi-max-frequency: true
> > +
> > +  spi-cpha: true
> > +
> > +  spi-cpol: true
> > +
> > +  vref-supply:
> > +    description:
> > +      Some devices have a specific reference voltage supplied on a different
> > +      pin to the other supplies. Needed to be able to establish channel scaling
> > +      unless there is also an internal reference available (e.g. mcp3564r)
> > +
> > +  microchip,hw-device-address:
> > +    $ref: /schemas/types.yaml#/definitions/uint32
> > +    minimum: 0
> > +    maximum: 3
> > +    description:
> > +      The address is set on a per-device basis by fuses in the factory,
> > +      configured on request. If not requested, the fuses are set for 0x1.
> > +      The device address is part of the device markings to avoid
> > +      potential confusion. This address is coded on two bits, so four possible
> > +      addresses are available when multiple devices are present on the same
> > +      SPI bus with only one Chip Select line for all devices.
> > +
> > +  "#io-channel-cells":  
> 
> That's a typo, "io" should be "iio", right?

Nope.  I honestly can't remember the history behind that, but it's
just io. Probably to do with IIO being Linux specific and this needing
to be generic, but its just an educated guess.

Jonathan

Rob Herring June 8, 2023, 7:34 p.m. UTC | #6

On Sat, May 20, 2023 at 04:17:53PM +0100, Jonathan Cameron wrote:
> On Fri, 19 May 2023 19:29:15 +0100
> Conor Dooley <[e-mail]> wrote:
> 
> > Hey Marius,
> > 
> > On Fri, May 19, 2023 at 07:01:44PM +0300, [e-mail] wrote:
> > > From: Marius Cristea <[e-mail]>
> > > 
> > > This is the device tree schema for iio driver for
> > > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > > Delta-Sigma ADCs with an SPI interface.  
> > 
> > Just one quick process bit, please try to CC all of the maintainers
> > listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
> > 3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
> > vendor tree?
> > 
> > > Signed-off-by: Marius Cristea <[e-mail]>
> > > ---  
> > 
> > > +  vref-supply:
> > > +    description:
> > > +      Some devices have a specific reference voltage supplied on a different
> > > +      pin to the other supplies. Needed to be able to establish channel scaling
> > > +      unless there is also an internal reference available (e.g. mcp3564r)  
> > 
> > Should this be marked as a required property for the non-r devices that
> > do not have an internal reference?
> > 
> > > +  microchip,hw-device-address:  
> > 
> > Hopefully Rob or Jonathan etc can chime in as to whether a common
> > property exists for this type of thing...
> > 
> Nope. This is a new one for me - there are devices that work on a daisy chain
> principle but I think this one works by encoding stuff in the actual message
> which is unusual for SPI.

Not something I've seen either.

> 
> > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > +    minimum: 0
> > > +    maximum: 3
> > > +    description:
> > > +      The address is set on a per-device basis by fuses in the factory,
> > > +      configured on request. If not requested, the fuses are set for 0x1.
> > > +      The device address is part of the device markings to avoid
> > > +      potential confusion. This address is coded on two bits, so four possible
> > > +      addresses are available when multiple devices are present on the same
> > > +      SPI bus with only one Chip Select line for all devices.  

What's this going to look like with more than one device? It would need 
to be incorporated into 'reg' and the unit-address to work. Something 
like this is 

spi {
  device0@0 {
    reg = <0>;
    microchip,hw-device-address = <0>;
  };

  device1@0 {
    reg = <0>;
    microchip,hw-device-address = <1>;
  };
};

That should throw warnings because you have 2 nodes at the same address 
which is not good practice.

I think you need a spi mux in here with the mux addresses being the 
microchip,hw-device-address values.

Rob

Jonathan Cameron June 9, 2023, 5:41 p.m. UTC | #7

On Thu, 8 Jun 2023 13:34:43 -0600
Rob Herring <[e-mail]> wrote:

> On Sat, May 20, 2023 at 04:17:53PM +0100, Jonathan Cameron wrote:
> > On Fri, 19 May 2023 19:29:15 +0100
> > Conor Dooley <[e-mail]> wrote:
> >   
> > > Hey Marius,
> > > 
> > > On Fri, May 19, 2023 at 07:01:44PM +0300, [e-mail] wrote:  
> > > > From: Marius Cristea <[e-mail]>
> > > > 
> > > > This is the device tree schema for iio driver for
> > > > Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
> > > > Delta-Sigma ADCs with an SPI interface.    
> > > 
> > > Just one quick process bit, please try to CC all of the maintainers
> > > listed by get_maintainer.pl - you unfortunately managed to miss 2 of the
> > > 3 dt-binding maintainers :/ Perhaps you ran get_maintainer.pl using our
> > > vendor tree?
> > >   
> > > > Signed-off-by: Marius Cristea <[e-mail]>
> > > > ---    
> > >   
> > > > +  vref-supply:
> > > > +    description:
> > > > +      Some devices have a specific reference voltage supplied on a different
> > > > +      pin to the other supplies. Needed to be able to establish channel scaling
> > > > +      unless there is also an internal reference available (e.g. mcp3564r)    
> > > 
> > > Should this be marked as a required property for the non-r devices that
> > > do not have an internal reference?
> > >   
> > > > +  microchip,hw-device-address:    
> > > 
> > > Hopefully Rob or Jonathan etc can chime in as to whether a common
> > > property exists for this type of thing...
> > >   
> > Nope. This is a new one for me - there are devices that work on a daisy chain
> > principle but I think this one works by encoding stuff in the actual message
> > which is unusual for SPI.  
> 
> Not something I've seen either.
> 
> >   
> > > > +    $ref: /schemas/types.yaml#/definitions/uint32
> > > > +    minimum: 0
> > > > +    maximum: 3
> > > > +    description:
> > > > +      The address is set on a per-device basis by fuses in the factory,
> > > > +      configured on request. If not requested, the fuses are set for 0x1.
> > > > +      The device address is part of the device markings to avoid
> > > > +      potential confusion. This address is coded on two bits, so four possible
> > > > +      addresses are available when multiple devices are present on the same
> > > > +      SPI bus with only one Chip Select line for all devices.    
> 
> What's this going to look like with more than one device? It would need 
> to be incorporated into 'reg' and the unit-address to work. Something 
> like this is 
> 
> spi {
>   device0@0 {
>     reg = <0>;
>     microchip,hw-device-address = <0>;
>   };
> 
>   device1@0 {
>     reg = <0>;
>     microchip,hw-device-address = <1>;
>   };
> };
> 
> That should throw warnings because you have 2 nodes at the same address 
> which is not good practice.
> 
> I think you need a spi mux in here with the mux addresses being the 
> microchip,hw-device-address values.

Something that looked like an spi-mux would be cute I'm not sure how
easy it would be to make it work given need to modify the messages
(rather sending extra ones before and after with a different chip select).

It would be nice if it were somewhat generic - so binding included which
bits would be replaced with the 'chip select' for the spi controller that
represents the mux.

Jonathan


> 
> Rob
>

Patch

diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
new file mode 100644
index 000000000000..407a125e3776
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3564.yaml
@@ -0,0 +1,88 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip MCP346X and MCP356X ADC Family
+
+maintainers:
+  - Marius Cristea <[e-mail]>
+
+description: |
+   Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
+   Delta-Sigma ADCs with an SPI interface.
+
+properties:
+  compatible:
+    enum:
+      - microchip,mcp3461
+      - microchip,mcp3462
+      - microchip,mcp3464
+      - microchip,mcp3461r
+      - microchip,mcp3462r
+      - microchip,mcp3464r
+      - microchip,mcp3561
+      - microchip,mcp3562
+      - microchip,mcp3564
+      - microchip,mcp3561r
+      - microchip,mcp3562r
+      - microchip,mcp3564r
+
+  reg:
+    maxItems: 1
+
+  spi-max-frequency: true
+
+  spi-cpha: true
+
+  spi-cpol: true
+
+  vref-supply:
+    description:
+      Some devices have a specific reference voltage supplied on a different
+      pin to the other supplies. Needed to be able to establish channel scaling
+      unless there is also an internal reference available (e.g. mcp3564r)
+
+  microchip,hw-device-address:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 3
+    description:
+      The address is set on a per-device basis by fuses in the factory,
+      configured on request. If not requested, the fuses are set for 0x1.
+      The device address is part of the device markings to avoid
+      potential confusion. This address is coded on two bits, so four possible
+      addresses are available when multiple devices are present on the same
+      SPI bus with only one Chip Select line for all devices.
+
+  "#io-channel-cells":
+    const: 1
+
+dependencies:
+  spi-cpol: [ spi-cpha ]
+  spi-cpha: [ spi-cpol ]
+
+required:
+  - compatible
+  - microchip,hw-device-address
+
+additionalProperties: false
+
+examples:
+  - |
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adc@0 {
+            compatible = "microchip,mcp3564r";
+            reg = <0>;
+            vref-supply = <&vref_reg>;
+            spi-cpha;
+            spi-cpol;
+            spi-max-frequency = <10000000>;
+            microchip,hw-device-address = <1>;
+        };
+    };
+...