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[79.16.6.145]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fa90e93absm531370515e9.9.2024.05.22.08.02.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 May 2024 08:02:54 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello To: jic23@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: nuno.sa@analog.com, lars@metafoo.de, Michael.Hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Angelo Dureghello Subject: [PATCH v2 5/6] iio: dac: ad3552r: change AD3552R_NUM_CH define name Date: Wed, 22 May 2024 17:01:40 +0200 Message-ID: <20240522150141.1776196-6-adureghello@baylibre.org> X-Mailer: git-send-email 2.45.0.rc1 In-Reply-To: <20240522150141.1776196-1-adureghello@baylibre.org> References: <20240522150141.1776196-1-adureghello@baylibre.org> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Angelo Dureghello After model data and num_hw_channles introduction, we have: ad3552r_desc, num_ch: used to keep channel number set in fdt, ad35xxr_model_data, num_hw_channels: for max channel checks, AD3552R_NUM_CH: just actually used to define the max array size on allocated arrays. Renaming AD3552R_NUM_CH to a more consistent name, as AD3552R_MAX_CH. Signed-off-by: Angelo Dureghello --- Changes for v2: - patch added in v2 --- drivers/iio/dac/ad3552r.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/dac/ad3552r.c b/drivers/iio/dac/ad3552r.c index b4630fb89334..b8bdbfed22e3 100644 --- a/drivers/iio/dac/ad3552r.c +++ b/drivers/iio/dac/ad3552r.c @@ -117,7 +117,7 @@ #define AD3552R_REG_ADDR_CH_INPUT_24B(ch) (0x4B - (1 - ch) * 3) /* Useful defines */ -#define AD3552R_NUM_CH 2 +#define AD3552R_MAX_CH 2 #define AD3552R_MASK_CH(ch) BIT(ch) #define AD3552R_MASK_ALL_CH GENMASK(1, 0) #define AD3552R_MAX_REG_SIZE 3 @@ -279,8 +279,8 @@ struct ad3552r_desc { struct gpio_desc *gpio_reset; struct gpio_desc *gpio_ldac; struct spi_device *spi; - struct ad3552r_ch_data ch_data[AD3552R_NUM_CH]; - struct iio_chan_spec channels[AD3552R_NUM_CH + 1]; + struct ad3552r_ch_data ch_data[AD3552R_MAX_CH]; + struct iio_chan_spec channels[AD3552R_MAX_CH + 1]; unsigned long enabled_ch; unsigned int num_ch; }; @@ -539,7 +539,7 @@ static int32_t ad3552r_trigger_hw_ldac(struct gpio_desc *ldac) static int ad3552r_write_all_channels(struct ad3552r_desc *dac, u8 *data) { int err, len; - u8 addr, buff[AD3552R_NUM_CH * AD3552R_MAX_REG_SIZE + 1]; + u8 addr, buff[AD3552R_MAX_CH * AD3552R_MAX_REG_SIZE + 1]; addr = AD3552R_REG_ADDR_CH_INPUT_24B(1); /* CH1 */ @@ -597,7 +597,7 @@ static irqreturn_t ad3552r_trigger_handler(int irq, void *p) struct iio_buffer *buf = indio_dev->buffer; struct ad3552r_desc *dac = iio_priv(indio_dev); /* Maximum size of a scan */ - u8 buff[AD3552R_NUM_CH * AD3552R_MAX_REG_SIZE]; + u8 buff[AD3552R_MAX_CH * AD3552R_MAX_REG_SIZE]; int err; memset(buff, 0, sizeof(buff));