From patchwork Mon May 27 17:02:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13675650 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 306AA15EFC2; Mon, 27 May 2024 17:02:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716829361; cv=none; b=adIYDljgim8gH1M0VMPHEuPJm32qqGoyBhXaqqTkjgANKU5xf70TeUBSNRwsCZBdNjvt7Xj4kggv9nlsTY9WfZqXsmIf9yJdS+Qcwf57F2KDT9S/+s5ErPv8+podNW+ulyNxdNGVR5GOke7xvtVpGmxSenmUPUbh2wylU+u9aDM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716829361; c=relaxed/simple; bh=F0lzZ14fTXQrTxKyI8DjrGPHhCUno1OsDNbUvitqXhw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XcKgC1+95zrYASC51IPcCYXfaSbz9jJqBTolav3bjURqWxLZ1Q0Mu1h7XY/xMg4mln1VkOd5W3HTDaBx08LXJ7rZFgUc2BUuu+76FCy2wtZaEGyueI6qDho24xkfbvsmOY4+JL7c2SumI6+QKc3EwY4Oe4sygMn0LP1cYu0jI7w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=WyZkKXII; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="WyZkKXII" Received: by smtp.kernel.org (Postfix) with ESMTPS id D5495C4AF0E; Mon, 27 May 2024 17:02:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716829360; bh=F0lzZ14fTXQrTxKyI8DjrGPHhCUno1OsDNbUvitqXhw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=WyZkKXII8QokgdRtMUTyHYA+dURVg4TBJekC8eQ9umm0fHl2rOCeFtVKy5Ia7/iBQ qj2j5Zdm0qb7L56CVGZwkj5dbc6b6eaJTASvZ7fnTzDIOienEFvTH7f+Pn9FOp3NJq 5nqryn9SURtNZ1T9FpwO3n/qed5Hv/XtedIMFFgGFMnVIN98YlsDb8azK1Tkjbr8iv RUWp8bcp4Ckov51jdgyQus0mV3VMA9UeTkZNnt3vqmbjvf1qE5xbOMtr/crX647EZJ 5PdRMTS0Q97scjBoSUkDlgQ0/vCGi9A1bfv5mZfJjl0HgiHKSUfgx1PpFqWa56SxQi rC/goRvBwX2GA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C93BAC25B74; Mon, 27 May 2024 17:02:40 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Mon, 27 May 2024 20:02:37 +0300 Subject: [PATCH v3 4/6] iio: adc: ad7173: add support for special inputs Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240527-ad4111-v3-4-7e9eddbbd3eb@analog.com> References: <20240527-ad4111-v3-0-7e9eddbbd3eb@analog.com> In-Reply-To: <20240527-ad4111-v3-0-7e9eddbbd3eb@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1716829358; l=3852; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=MRZQD3ZIgMLGillTt7a6yf7hgjX5HZgUNfhbQgcmjz8=; b=97SV4ZcceTfhjZr8VFafOTz30DxaJpzMSLfeNzIbuf9lvaZfKzxuPBJnUuJ365+Rsvj+6xcUr vnMYGNtt6p9BFooYk4lIvdqKHs7B2yhTI/nh43kwvW5gqbTdu2EY9zH X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Add support for selecting REF+ and REF- inputs on all models. Add support for selecting ((AVDD1 − AVSS)/5) inputs on supported models. Signed-off-by: Dumitru Ceclan Reviewed-by: Nuno Sa --- drivers/iio/adc/ad7173.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 8a53821c8e58..106a50dbabd4 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -65,6 +65,10 @@ FIELD_PREP(AD7173_CH_SETUP_AINNEG_MASK, neg)) #define AD7173_AIN_TEMP_POS 17 #define AD7173_AIN_TEMP_NEG 18 +#define AD7173_AIN_COM_IN_POS 19 +#define AD7173_AIN_COM_IN_NEG 20 +#define AD7173_AIN_REF_POS 21 +#define AD7173_AIN_REF_NEG 22 #define AD7172_2_ID 0x00d0 #define AD7175_ID 0x0cd0 @@ -145,6 +149,8 @@ struct ad7173_device_info { unsigned int id; char *name; bool has_temp; + /* ((AVDD1 − AVSS)/5) */ + bool has_common_input; bool has_input_buf; bool has_int_ref; bool has_ref2; @@ -215,6 +221,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_common_input = true, .clock = 2 * HZ_PER_MHZ, .sinc5_data_rates = ad7173_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -229,6 +236,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = false, .has_input_buf = true, .has_ref2 = true, + .has_common_input = true, .clock = 2 * HZ_PER_MHZ, .sinc5_data_rates = ad7173_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -244,6 +252,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_input_buf = true, .has_int_ref = true, .has_ref2 = true, + .has_common_input = false, .clock = 2 * HZ_PER_MHZ, .sinc5_data_rates = ad7173_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -258,6 +267,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_common_input = true, .clock = 16 * HZ_PER_MHZ, .sinc5_data_rates = ad7175_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), @@ -273,6 +283,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_input_buf = true, .has_int_ref = true, .has_ref2 = true, + .has_common_input = true, .clock = 16 * HZ_PER_MHZ, .sinc5_data_rates = ad7175_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), @@ -287,6 +298,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = false, .has_input_buf = false, .has_int_ref = true, + .has_common_input = false, .clock = 16 * HZ_PER_MHZ, .sinc5_data_rates = ad7175_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), @@ -301,6 +313,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_common_input = true, .clock = 16 * HZ_PER_MHZ, .odr_start_value = AD7177_ODR_START_VALUE, .sinc5_data_rates = ad7175_sinc5_data_rates, @@ -915,6 +928,14 @@ static int ad7173_validate_voltage_ain_inputs(struct ad7173_state *st, if (ain[i] < st->info->num_inputs) continue; + if (ain[i] == AD7173_AIN_REF_POS || ain[i] == AD7173_AIN_REF_NEG) + continue; + + if ((ain[i] == AD7173_AIN_COM_IN_POS || + ain[i] == AD7173_AIN_COM_IN_NEG) && + st->info->has_common_input) + continue; + return dev_err_probe(dev, -EINVAL, "Input pin number out of range for pair (%d %d).\n", ain[0], ain[1]);