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([5.2.194.157]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cbb05b465sm308861a12.18.2024.06.13.04.40.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Jun 2024 04:40:26 -0700 (PDT) From: Alisa-Dariana Roman X-Google-Original-From: Alisa-Dariana Roman To: Alisa-Dariana Roman , Jonathan Cameron , Michael Hennerich , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Alexandru Tachici , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown Subject: [PATCH v4 2/5] dt-bindings: iio: adc: ad7192: Update clock config Date: Thu, 13 Jun 2024 14:39:58 +0300 Message-Id: <20240613114001.270233-3-alisa.roman@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240613114001.270233-1-alisa.roman@analog.com> References: <20240613114001.270233-1-alisa.roman@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are actually 4 configuration modes of clock source for AD719X devices. Either a crystal can be attached externally between MCLK1 and MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 pin. The other 2 modes make use of the 4.92MHz internal clock. Add clock name xtal alongside mclk. When an external crystal is attached, xtal should be chosen. When an external clock is used, mclk should be chosen. The presence of an external clock source is optional, not required. When absent, internal clock is used. Modify required property accordingly and modify second example to showcase this. Signed-off-by: Alisa-Dariana Roman --- .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index a03da9489ed9..3ae2f860d24c 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -39,11 +39,15 @@ properties: clocks: maxItems: 1 - description: phandle to the master clock (mclk) + description: | + Optionally, either a crystal can be attached externally between MCLK1 and + MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 + pin. If absent, internal 4.92MHz clock is used. clock-names: - items: - - const: mclk + enum: + - xtal + - mclk interrupts: maxItems: 1 @@ -135,8 +139,6 @@ patternProperties: required: - compatible - reg - - clocks - - clock-names - interrupts - dvdd-supply - avdd-supply @@ -202,8 +204,6 @@ examples: spi-max-frequency = <1000000>; spi-cpol; spi-cpha; - clocks = <&ad7192_mclk>; - clock-names = "mclk"; interrupts = <25 0x2>; interrupt-parent = <&gpio>; aincom-supply = <&aincom>;