| Message ID | 20240618142138.520192-3-alisa.roman@analog.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | iio: adc: ad7192: Improvements | expand |
On Tue, Jun 18, 2024 at 05:21:34PM +0300, Alisa-Dariana Roman wrote: > There are actually 4 configuration modes of clock source for AD719X > devices. Either a crystal can be attached externally between MCLK1 and > MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 > pin. The other 2 modes make use of the 4.92MHz internal clock. > > To configure external clock as either a crystal or a CMOS-compatible > clock, changing the register settings is necessary. Therefore, add clock > name xtal alongside mclk. By selecting one or the other, the register is > configured. > > The presence of an external clock source is optional, not required. When > absent, internal clock is used. Modify required property accordingly. Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index a03da9489ed9..67384bed4cd3 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -39,11 +39,15 @@ properties: clocks: maxItems: 1 - description: phandle to the master clock (mclk) + description: + Optionally, either a crystal can be attached externally between MCLK1 and + MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 + pin. If absent, internal 4.92MHz clock is used. clock-names: - items: - - const: mclk + enum: + - xtal + - mclk interrupts: maxItems: 1 @@ -135,8 +139,6 @@ patternProperties: required: - compatible - reg - - clocks - - clock-names - interrupts - dvdd-supply - avdd-supply
There are actually 4 configuration modes of clock source for AD719X devices. Either a crystal can be attached externally between MCLK1 and MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2 pin. The other 2 modes make use of the 4.92MHz internal clock. To configure external clock as either a crystal or a CMOS-compatible clock, changing the register settings is necessary. Therefore, add clock name xtal alongside mclk. By selecting one or the other, the register is configured. The presence of an external clock source is optional, not required. When absent, internal clock is used. Modify required property accordingly. Signed-off-by: Alisa-Dariana Roman <alisa.roman@analog.com> --- .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)