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a=ed25519-sha256; t=1722429445; l=1054; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=pAZDjeecp6rsXv/22TRVi6mFQYwYZQxzVZ7EkKQ7Log=; b=NeEEZRkVw4/ZYL9IfEvfTbPWR4tgG/MXAaeWn1+ZjSGidF2KnEovqinKaPEhp1y/DPdH+Crve uBU3sga4qM2DvGxMP9c4yyxmwm1kHeFXW5bfG61ea9DPXqZtVxw68g3 X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= The ad7124_soft_reset() function has the assumption that the chip will assert the "power-on reset" bit in the STATUS register after a software reset without any delay. The POR bit =0 is used to check if the chip initialization is done. A chip ID mismatch probe error appears intermittently when the probe continues too soon and the ID register does not contain the expected value. Fix by adding a 200us delay after the software reset command is issued. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Dumitru Ceclan --- drivers/iio/adc/ad7124.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index e7b1d517d3de..54d4c5597696 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -762,6 +762,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) if (ret < 0) return ret; + fsleep(200); timeout = 100; do { ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval);