@@ -17,13 +17,20 @@ description: |
interface for the actual ADC, while this IP core will interface
to the data-lines of the ADC and handle the streaming of data into
memory via DMA.
+ In some cases, the AXI ADC interface is used to perform specialized
+ operation to a particular ADC, e.g access the physical bus through
+ some special register to write ADC registers.
+ In this case, a different compatible is used, and the driver behaves
+ slightly differently according to the special needs.
https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
+ http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
properties:
compatible:
enum:
- adi,axi-adc-10.0.a
+ - adi,axi-ad7606x
reg:
maxItems: 1
A new compatible is added to reflect the specialized version of the HDL that is not covered by the IIO backend paradigm: We use the parallel interface to write the ADC's registers, and accessing this interface requires to use ADI_AXI_REG_CONFIG_RD,ADI_AXI_REG_CONFIG_WR and ADI_AXI_REG_CONFIG_CTRL in a custom fashion. Signed-off-by: Guillaume Stols <gstols@baylibre.com> --- Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml | 7 +++++++ 1 file changed, 7 insertions(+)