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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbedf63sm2151095f8f.102.2024.11.22.03.33.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:33:57 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 01/10] iio: adc: ad7124: Don't create more channels than the driver can handle Date: Fri, 22 Nov 2024 12:33:20 +0100 Message-ID: <20241122113322.242875-13-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1454; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=zn8zvV9Mo4O2rpc8Z3avU2Iyc7Z00tacRFBEl6WqSmQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwFdZucAX2c0f4j3lwLFQfEx4Ynwm9Zsma60 WqCqNIV1u+JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsBQAKCRCPgPtYfRL+ TqowB/92c27FdrHVsaMkzSVvM/75ogPI76TKY+Fck42/nyak/0MB5xhqAVN2YJMG0FokNJV9MzY SEDtU7+h1v5z9i9ZBQLDLpbD6AdyipPFBY4Gi6GzjWP/vO/4i7E2m+EcWu188GqwiF1CxD6bu/B TZeRtUjhE4OdiIeDm7iywuJIiWOYsbVco0+qZAVMogRxEeJvL+4uLu1g7TERZg2KUc1YRPLCw8B tGIyVJrK7SKkBPXxrbsTzOAJN2q63JiOPJtd/pAzjp+1OWg4zozDSo2z/T/0/R3feqDevh6ZgKW YuA75Hz1LXj1PJ8cxwlGhul91KZSiXpiflNmGuto6S+c8b9P X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 8d94bc2b1cac..5352b26bb391 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -821,6 +821,16 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (!st->num_channels) return dev_err_probe(dev, -ENODEV, "no channel children\n"); + /* + * The driver assigns each logical channel defined in the device tree + * statically one channel register. So only accept 16 such logical + * channels to not treat CONFIG_0 (i.e. the register following + * CHANNEL_15) as an additional channel register. The driver could be + * improved to lift this limitation. + */ + if (st->num_channels > AD7124_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan)