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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fb30bfdsm2157536f8f.56.2024.11.22.03.34.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:00 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 03/10] dt-bindings: iio: adc: adi,ad7124: Allow specifications of a gpio for irq line Date: Fri, 22 Nov 2024 12:33:22 +0100 Message-ID: <20241122113322.242875-15-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1905; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=LR5pHXckvZl5Tv7d1tyrP9QH9OzPMit0Fd60NybG8t8=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwK3n0rFUM30pvMNf0ReBZRIcrNLiAQoOy/d bLmRqnRrsKJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsCgAKCRCPgPtYfRL+ TnR+CACN4VPCHsuSilSXsvvasA4WJ1MsIkTRD4pl2WLgcQO4UVd2c+rgE3f8GcTEJJPEJ7hHlyp GCCwJG8VnTiXDwhy/tTgThdp+0jispOOYSd0IInnPhkXoPCldh8mMSXZ/TbtPLQbvEnvvpbhBCy xtgbFzSQijGhKeZlyFe3+2itLaNw6pldUMhzAbTw3c+x9/n20FbGunCfBqSZtksGGZwYv8kdIDB sPCzZE2szpxkrerQsxV1foDGtccVlw0qPXNu0hfm9vZxSzKLT7PPxMFIPBldkKFiuKC+j2zX8Hk NROdSun/Cg9oC5Abjw4CEWRbVDNOTJCGzW8hDZrQ5scU1Rlf X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip the logical irq line (̅R̅D̅Y) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 35ed04350e28..ebe77cbe87ff 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,12 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: | + GPIO reading the ̅R̅D̅Y line. Useful to reliably detect the interrupt + condition. + maxItems: 1 + '#address-cells': const: 1 @@ -111,6 +117,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -121,6 +128,7 @@ examples: spi-max-frequency = <5000000>; interrupts = <25 2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; clocks = <&ad7124_mclk>; clock-names = "mclk";