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Fri, 29 Nov 2024 10:34:21 -0500 Received: from ASHBCASHYB5.ad.analog.com (10.64.17.133) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 29 Nov 2024 10:34:21 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB5.ad.analog.com (10.64.17.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 29 Nov 2024 10:34:21 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Fri, 29 Nov 2024 10:34:21 -0500 Received: from amiclaus-VirtualBox.ad.analog.com (AMICLAUS-L02.ad.analog.com [10.48.65.161]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 4ATFY6dk001089; Fri, 29 Nov 2024 10:34:15 -0500 From: Antoniu Miclaus To: , , , , , , CC: Antoniu Miclaus Subject: [PATCH v3 1/2] dt-bindings: iio: adf4371: add rdiv2 and doubler Date: Fri, 29 Nov 2024 17:33:52 +0200 Message-ID: <20241129153356.63547-2-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241129153356.63547-1-antoniu.miclaus@analog.com> References: <20241129153356.63547-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: e0XZ-V36WFK9zsP4NBX17Ux9Xk1BEfGU X-Proofpoint-ORIG-GUID: e0XZ-V36WFK9zsP4NBX17Ux9Xk1BEfGU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 spamscore=0 mlxscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2411290126 Add support for reference doubler enable and reference divide by 2 clock. Both of these blocks are optional on the frequency path within the chip and can be adjusted depending on the custom needs of the applications. The doubler is useful for increasing the PFD comparison frequency which will result in a noise performance of the system. The reference divide by 2 divides the reference signal by 2, resulting in a 50% duty cycle PFD frequency. Signed-off-by: Antoniu Miclaus --- changes in v3: - add explanation in commit body .../devicetree/bindings/iio/frequency/adf4371.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 1cb2adaf66f9..ef241c38520c 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,6 +40,17 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. + adi,reference-doubler-enable: + type: boolean + description: + If this property is present, the reference doubler block is enabled. + + adi,adi,reference-div2-enable: + type: boolean + description: + If this property is present, the reference divide by 2 clock is enabled. + This feature can be used to provide a 50% duty cycle signal to the PFD. + required: - compatible - reg