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Fri, 20 Dec 2024 04:56:37 -0500 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 20 Dec 2024 04:56:37 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Fri, 20 Dec 2024 04:56:37 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Fri, 20 Dec 2024 04:56:37 -0500 Received: from amiclaus-VirtualBox.ad.analog.com (AMICLAUS-L02.ad.analog.com [10.48.65.133]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 4BK9uROW023622; Fri, 20 Dec 2024 04:56:34 -0500 From: Antoniu Miclaus To: , , , , , , CC: Antoniu Miclaus Subject: [PATCH v3 2/3] iio: frequency: adf4371: add refin mode Date: Fri, 20 Dec 2024 11:56:14 +0200 Message-ID: <20241220095620.4918-3-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241220095620.4918-1-antoniu.miclaus@analog.com> References: <20241220095620.4918-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: PSRi3Dqb5LesPlPT0QW2ezoggyjRyrNb X-Proofpoint-ORIG-GUID: PSRi3Dqb5LesPlPT0QW2ezoggyjRyrNb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 impostorscore=0 suspectscore=0 clxscore=1015 spamscore=0 priorityscore=1501 phishscore=0 mlxlogscore=999 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412200082 Add support for single-ended/differential reference input mode. Signed-off-by: Antoniu Miclaus --- changes in v3: - parse refin-mode options. drivers/iio/frequency/adf4371.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c index b27088464826..34fb75c379b0 100644 --- a/drivers/iio/frequency/adf4371.c +++ b/drivers/iio/frequency/adf4371.c @@ -41,6 +41,10 @@ #define ADF4371_MOD2WORD_MSK GENMASK(5, 0) #define ADF4371_MOD2WORD(x) FIELD_PREP(ADF4371_MOD2WORD_MSK, x) +/* ADF4371_REG22 */ +#define ADF4371_REFIN_MODE_MASK BIT(6) +#define ADF4371_REFIN_MODE(x) FIELD_PREP(ADF4371_REFIN_MODE_MASK, x) + /* ADF4371_REG24 */ #define ADF4371_RF_DIV_SEL_MSK GENMASK(6, 4) #define ADF4371_RF_DIV_SEL(x) FIELD_PREP(ADF4371_RF_DIV_SEL_MSK, x) @@ -69,6 +73,7 @@ #define ADF4371_MAX_FREQ_PFD 250000000UL /* Hz */ #define ADF4371_MAX_FREQ_REFIN 600000000UL /* Hz */ +#define ADF4371_MAX_FREQ_REFIN_SE 500000000UL /* Hz */ /* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */ #define ADF4371_MODULUS1 33554432ULL @@ -476,6 +481,7 @@ static int adf4371_setup(struct adf4371_state *st) { unsigned int synth_timeout = 2, timeout = 1, vco_alc_timeout = 1; unsigned int vco_band_div, tmp; + bool ref_diff_en = false; int ret; /* Perform a software reset */ @@ -497,12 +503,30 @@ static int adf4371_setup(struct adf4371_state *st) return ret; } + if (!device_property_match_string(&st->spi->dev, "adi,refin-mode", + "refin-diff")) + ref_diff_en = true; + else if (!device_property_match_string(&st->spi->dev, "adi,refin-mode", + "refin-se")) + ref_diff_en = false; + /* Set address in ascending order, so the bulk_write() will work */ ret = regmap_update_bits(st->regmap, ADF4371_REG(0x0), ADF4371_ADDR_ASC_MSK | ADF4371_ADDR_ASC_R_MSK, ADF4371_ADDR_ASC(1) | ADF4371_ADDR_ASC_R(1)); if (ret < 0) return ret; + + if ((ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN) || + (!ref_diff_en && st->clkin_freq > ADF4371_MAX_FREQ_REFIN_SE)) + return -EINVAL; + + ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22), + ADF4371_REFIN_MODE_MASK, + ADF4371_REFIN_MODE(ref_diff_en)); + if (ret < 0) + return ret; + /* * Calculate and maximize PFD frequency * fPFD = REFIN × ((1 + D)/(R × (1 + T)))