Message ID | 20250110-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v3-6-ab42aef0d840@baylibre.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | iio: ad3552r-hs: add support for ad3541/42r Angelo Dureghello | expand |
On 1/10/25 4:24 AM, Angelo Dureghello wrote: > From: Angelo Dureghello <adureghello@baylibre.com> > > Use "instruction" mode over initial configuration and all other > non-streaming operations. > > DAC boots in streaming mode as default, and the driver is not > changing this mode. > > Instruction r/w is still working becouse instruction is processed s/becouse/because/ > from the DAC after chip select is deasserted, this works until > loop mode is 0 or greater than the instruction size. > > All initial operations should be more safely done in instruction > mode, a mode provided for this. > > Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> > --- > drivers/iio/dac/ad3552r-hs.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c > index 27949f207d42..991b11702273 100644 > --- a/drivers/iio/dac/ad3552r-hs.c > +++ b/drivers/iio/dac/ad3552r-hs.c > @@ -132,6 +132,13 @@ static int ad3552r_hs_buffer_postenable(struct iio_dev *indio_dev) > return -EINVAL; > } > > + /* Primary region access, set streaming mode (now in SPI + SDR). */ > + ret = ad3552r_qspi_update_reg_bits(st, > + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, > + AD3552R_MASK_SINGLE_INST, 0, 1); > + if (ret) > + return ret; Do we need to undo this operation before we return in the case of an error later in this function? > + > ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_STREAM_MODE, > loop_len, 1); > if (ret)
diff --git a/drivers/iio/dac/ad3552r-hs.c b/drivers/iio/dac/ad3552r-hs.c index 27949f207d42..991b11702273 100644 --- a/drivers/iio/dac/ad3552r-hs.c +++ b/drivers/iio/dac/ad3552r-hs.c @@ -132,6 +132,13 @@ static int ad3552r_hs_buffer_postenable(struct iio_dev *indio_dev) return -EINVAL; } + /* Primary region access, set streaming mode (now in SPI + SDR). */ + ret = ad3552r_qspi_update_reg_bits(st, + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, + AD3552R_MASK_SINGLE_INST, 0, 1); + if (ret) + return ret; + ret = st->data->bus_reg_write(st->back, AD3552R_REG_ADDR_STREAM_MODE, loop_len, 1); if (ret) @@ -198,6 +205,14 @@ static int ad3552r_hs_buffer_predisable(struct iio_dev *indio_dev) if (ret) return ret; + /* Back to single instruction mode, disabling loop. */ + ret = ad3552r_qspi_update_reg_bits(st, + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, + AD3552R_MASK_SINGLE_INST, + AD3552R_MASK_SINGLE_INST, 1); + if (ret) + return ret; + return 0; } @@ -308,6 +323,13 @@ static int ad3552r_hs_setup(struct ad3552r_hs_state *st) if (ret) return ret; + ret = st->data->bus_reg_write(st->back, + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, + AD3552R_MASK_SINGLE_INST | + AD3552R_MASK_SHORT_INSTRUCTION, 1); + if (ret) + return ret; + ret = ad3552r_hs_scratch_pad_test(st); if (ret) return ret;