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[2003:f6:5f0a:fb04::1b9]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab384f1e57bsm27662766b.104.2025.01.16.10.03.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 10:03:56 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron Cc: linux-iio@vger.kernel.org Subject: [PATCH] iio: adc: ad7124: Micro-optimize channel disabling Date: Thu, 16 Jan 2025 19:03:41 +0100 Message-ID: <20250116180342.161323-2-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.47.1 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1764; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=GwRq+kkkV8MvTF7h5hme6wF7GfXh8COHwtUtoOZOKPk=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBniUn+mk25K5P0L4+Eodthff0QCZl3G6pSYPiL7 F2BgzXMnQOJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ4lJ/gAKCRCPgPtYfRL+ TjQ4B/42aDBExTlhSn2mQubQqo3uSWY9EpVbCBbl4q82ZH1ycpawXrVW8vHsM0SmUK3wXUYfLVX DatspVhS7Oo1NP3cAWwrTn+7h4+p47vO70YBavDfYnJXTtIcsrnfKd73w9jFO1YJeF6eC+NOQPU FTqBI5GqMdPr4U9pLyI4hpKRYGM/gp4H/bz/HU1v9c6mvWGL0D3dUVlj3P8enhfQLnGneGyRB64 LLjLMuZWTLorpChq1bYS1TpdszITJywQQKmPFf0DYRUZ9/BR6IPsrKk82PziIG0IT4kE4D4HxuX Le4r7GOe8LA6lMDk0NxUPH2zV/7vdQrtElGzjEXQKhe7Re9E X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The key objective in ad7124_disable_one() is clearing the AD7124_CHANNEL_EN_MSK bit in the channel register. However there is no advantage to keep the other bits in that register because when the channel is used next time, all fields are rewritten anyhow. So instead of using ad7124_spi_write_mask() (which is a register read plus a register write) use a simple register write clearing the complete register. Signed-off-by: Uwe Kleine-König --- Hello, while looking at traces I spotted this unnecessary register read. On my machine (de10nano) this register read takes ~23 µs when doing cat /sys/bus/iio/devices/iio:device0/in_temp_raw . Compared to the time the chip needs for the actual conversion (~400 ms) this is little gain, but still. And more relevant for me: It simplifies trace studies. To state the obvious: This is totally not urgent and merge window material. Best regards Uwe drivers/iio/adc/ad7124.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) base-commit: b323d8e7bc03d27dec646bfdccb7d1a92411f189 diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 6ae27cdd3250..73c831626bf3 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -559,7 +559,8 @@ static int ad7124_disable_one(struct ad_sigma_delta *sd, unsigned int chan) { struct ad7124_state *st = container_of(sd, struct ad7124_state, sd); - return ad7124_spi_write_mask(st, AD7124_CHANNEL(chan), AD7124_CHANNEL_EN_MSK, 0, 2); + /* The relevant thing here is that AD7124_CHANNEL_EN_MSK is cleared. */ + return ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan), 2, 0); } static const struct ad_sigma_delta_info ad7124_sigma_delta_info = {