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Tue, 11 Feb 2025 18:49:19 -0500 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 11 Feb 2025 18:49:19 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 11 Feb 2025 18:49:19 -0500 Received: from JSANTO12-L01.ad.analog.com ([10.65.60.206]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 51BNn7tp009925; Tue, 11 Feb 2025 18:49:10 -0500 From: Jonathan Santos To: , , CC: Jonathan Santos , , , , , , , , , Subject: [PATCH v3 14/17] iio: adc: ad7768-1: add support for Synchronization over SPI Date: Tue, 11 Feb 2025 20:49:05 -0300 Message-ID: <20250211234905.1009129-1-Jonathan.Santos@analog.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: bkALln88QwqCEPmeTSMQCIS5pGhPWi-p X-Authority-Analysis: v=2.4 cv=FabNxI+6 c=1 sm=1 tr=0 ts=67abe200 cx=c_pps a=PpDZqlmH/M8setHirZLBMw==:117 a=PpDZqlmH/M8setHirZLBMw==:17 a=T2h4t0Lz3GQA:10 a=gAnH3GRIAAAA:8 a=GG6iHBmmjjhrLsviHDgA:9 a=oVHKYsEdi7-vN-J5QA_j:22 X-Proofpoint-GUID: bkALln88QwqCEPmeTSMQCIS5pGhPWi-p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-11_10,2025-02-11_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 adultscore=0 spamscore=0 impostorscore=0 priorityscore=1501 phishscore=0 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502110158 The synchronization method using GPIO requires the generated pulse to be truly synchronous with the base MCLK signal. When it is not possible to do that in hardware, the datasheet recommends using synchronization over SPI, where the generated pulse is already synchronous with MCLK. This requires the SYNC_OUT pin to be connected to SYNC_IN pin. Use trigger-sources property to enable device synchronization over SPI. Signed-off-by: Jonathan Santos --- v3 Changes: * Fixed args.fwnode leakage in the trigger-sources parsing. * Synchronization over spi is enabled when the trigger-sources references the own device. * Synchronization is kept within the device, and return error if the gpio is not defined and the trigger-sources reference does not match the current device. v2 Changes: * Synchronization via SPI is enabled when the Sync GPIO is not defined. * now trigger-sources property indicates the synchronization provider or main device. The main device will be used to drive the SYNC_IN when requested (via GPIO or SPI). --- drivers/iio/adc/ad7768-1.c | 80 ++++++++++++++++++++++++++++++++++---- 1 file changed, 72 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c index c16149b395af..716cf3582577 100644 --- a/drivers/iio/adc/ad7768-1.c +++ b/drivers/iio/adc/ad7768-1.c @@ -211,6 +211,7 @@ struct ad7768_state { struct iio_trigger *trig; struct gpio_desc *gpio_sync_in; struct gpio_desc *gpio_reset; + bool en_spi_sync; const char *labels[ARRAY_SIZE(ad7768_channels)]; /* * DMA (thus cache coherency maintenance) may require the @@ -291,6 +292,19 @@ static const struct regmap_config ad7768_regmap24_config = { .max_register = AD7768_REG_COEFF_DATA, }; +static int ad7768_send_sync_pulse(struct ad7768_state *st) +{ + if (st->en_spi_sync) + return regmap_write(st->regmap, AD7768_REG_SYNC_RESET, 0x00); + + if (st->gpio_sync_in) { + gpiod_set_value_cansleep(st->gpio_sync_in, 1); + gpiod_set_value_cansleep(st->gpio_sync_in, 0); + } + + return 0; +} + static int ad7768_set_mode(struct ad7768_state *st, enum ad7768_conv_mode mode) { @@ -387,10 +401,7 @@ static int ad7768_set_dig_fil(struct ad7768_state *st, return ret; /* A sync-in pulse is required every time the filter dec rate changes */ - gpiod_set_value(st->gpio_sync_in, 1); - gpiod_set_value(st->gpio_sync_in, 0); - - return 0; + return ad7768_send_sync_pulse(st); } static int ad7768_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) @@ -671,6 +682,60 @@ static const struct iio_info ad7768_info = { .debugfs_reg_access = &ad7768_reg_access, }; +static int ad7768_setup_spi_sync(struct device *dev, struct ad7768_state *st) +{ + struct fwnode_reference_args args; + int ret; + + ret = fwnode_property_get_reference_args(dev_fwnode(dev), + "trigger-sources", + "#trigger-source-cells", + 0, 0, &args); + if (ret) + return dev_err_probe(dev, ret, "Failed to get trigger-sources reference\n"); + + /* + * Currently, the driver supports SPI-based synchronization only for + * single-device setups, where the device's own SYNC_OUT is looped back + * to its SYNC_IN. Only enable this feature if the trigger-sources + * references the current device. + */ + st->en_spi_sync = args.fwnode->dev == dev; + fwnode_handle_put(args.fwnode); + + return st->en_spi_sync ? 0 : -EOPNOTSUPP; +} + +static int ad7768_set_sync_source(struct device *dev, struct ad7768_state *st) +{ + int ret; + + /* + * The AD7768-1 allows two primary methods for driving the SYNC_IN pin + * to synchronize one or more devices: + * 1. Using a GPIO to directly drive the SYNC_IN pin. + * 2. Using a SPI command, where the SYNC_OUT pin generates a + * synchronization pulse that loops back to the SYNC_IN pin. + */ + st->gpio_sync_in = devm_gpiod_get_optional(dev, "adi,sync-in", + GPIOD_OUT_LOW); + if (IS_ERR(st->gpio_sync_in)) + return PTR_ERR(st->gpio_sync_in); + + /* + * If the SYNC_IN GPIO is not defined, fall back to synchronization + * over SPI. + */ + if (!st->gpio_sync_in) { + ret = ad7768_setup_spi_sync(dev, st); + if (ret) + return dev_err_probe(dev, ret, + "No valid synchronization source provided\n"); + } + + return 0; +} + static int ad7768_setup(struct iio_dev *indio_dev) { struct ad7768_state *st = iio_priv(indio_dev); @@ -701,10 +766,9 @@ static int ad7768_setup(struct iio_dev *indio_dev) return ret; } - st->gpio_sync_in = devm_gpiod_get(&st->spi->dev, "adi,sync-in", - GPIOD_OUT_LOW); - if (IS_ERR(st->gpio_sync_in)) - return PTR_ERR(st->gpio_sync_in); + ret = ad7768_set_sync_source(&st->spi->dev, st); + if (ret) + return ret; /* Only create a Chip GPIO if flagged for it */ if (device_property_read_bool(&st->spi->dev, "gpio-controller")) {