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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2c86a860267sm2541894fac.36.2025.04.01.15.50.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 15:50:39 -0700 (PDT) From: David Lechner Date: Tue, 01 Apr 2025 17:50:10 -0500 Subject: [PATCH 3/5] iio: adc: ad7380: move internal reference voltage to chip_info Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250401-iio-ad7380-add-ad7389-4-v1-3-23d2568aa24f@baylibre.com> References: <20250401-iio-ad7380-add-ad7389-4-v1-0-23d2568aa24f@baylibre.com> In-Reply-To: <20250401-iio-ad7380-add-ad7389-4-v1-0-23d2568aa24f@baylibre.com> To: Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-iio@vger.kernel.org Cc: Michael Hennerich , =?utf-8?q?Nuno_S=C3=A1?= , Jonathan Corbet , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7559; i=dlechner@baylibre.com; h=from:subject:message-id; bh=26skPYTIDO2AQWdbdEvqSLF0n/pqCouBi1jNjiWw2BM=; b=owEBgwJ8/ZANAwAKAR+K+IyC93wDAcsmYgBn7G23+fpllnvajujdFYWvihcUAddd6/sJprX3a hDEvB4GJLeJAkkEAAEKADMWIQSKc9gqah9QmQfzc4gfiviMgvd8AwUCZ+xttxUcZGF2aWRAbGVj aG5vbG9neS5jb20ACgkQH4r4jIL3fAPB/xAAvjJQJSDg8do1V8biJzFcaoLs611q+7CHgCWI+Bu o+IR8mqnMRF35zOr+w8a89tZOg59o2Oe228AwiwFIcmLZoAAfAWEaa0dqkWza+EoX+LUDqdJ9sb T4SOdWLGX/h1g2srZvS3s0Nlth8tPhVVzTar+iyKoLJY/mShvrkltfbrvtVsEltaoe+Js0JwLx6 sUEta0istBivS0sZAqZms+ObzZkSseCCMrPrGFbe/4PuzwH9No0JWssd4+SpBmW8L1lsJUzcw4N JeDa/X63uf3LO5X6BDxu1B9vRNiw+woLvGqN2048kCn8InEBBNqb21gYvYu5fcf9DR6hVqtQ2mF 9w95KR/iXrgTD7zbSdHDxJG3WPk/IYZjYzGpp4iKwdnj7nwJD51aecmyCx3/Gbd9HZESVDn1y58 ZckRDDcwv+80JhWglv2FKAqdPOEYxlN+OQFD7awf8iiEsUSfUtb1UEl07+9jNTukKibKlOvEp9b CyfAJj1NpHj9j7gK85FHkx6CHOz0r1m97ts0xpJ9iszoyw+fqsJWTTqVyFfuKzrcbncA5NhwRzj kOp/+bb51fRRzlfJLZG17t/KHIF0x6Mw1eOcD2wiuMBOxlU1xoyjH4U1kOmT0t3knwwCnM+2u3F fKmGciKkClYuBVcRUlj7SYQ0rER8KtUrNC0ViMVtgJHw= X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Move the internal reference voltage value to the chip_info structure. Before this change, only ADAQ chips could be internal_ref_only and only non-ADAQ chips could be external_ref_only. Now, this restriction is removed. Signed-off-by: David Lechner Reviewed-by: Nuno Sá --- drivers/iio/adc/ad7380.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad7380.c b/drivers/iio/adc/ad7380.c index 18ed07275be8e031e54f3595f70afe47514084cd..e5cd11fd7b1083af2082985f2c0226b1a97d600f 100644 --- a/drivers/iio/adc/ad7380.c +++ b/drivers/iio/adc/ad7380.c @@ -120,6 +120,7 @@ struct ad7380_chip_info { unsigned int num_supplies; bool external_ref_only; bool internal_ref_only; + unsigned int internal_ref_mv; const char * const *vcm_supplies; unsigned int num_vcm_supplies; const unsigned long *available_scan_masks; @@ -609,6 +610,7 @@ static const struct ad7380_chip_info ad7380_chip_info = { .num_simult_channels = 2, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .available_scan_masks = ad7380_2_channel_scan_masks, .timing_specs = &ad7380_timing, .max_conversion_rate_hz = 4 * MEGA, @@ -622,6 +624,7 @@ static const struct ad7380_chip_info ad7381_chip_info = { .num_simult_channels = 2, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .available_scan_masks = ad7380_2_channel_scan_masks, .timing_specs = &ad7380_timing, .max_conversion_rate_hz = 4 * MEGA, @@ -637,6 +640,7 @@ static const struct ad7380_chip_info ad7383_chip_info = { .num_supplies = ARRAY_SIZE(ad7380_supplies), .vcm_supplies = ad7380_2_channel_vcm_supplies, .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .available_scan_masks = ad7380_2_channel_scan_masks, .timing_specs = &ad7380_timing, .max_conversion_rate_hz = 4 * MEGA, @@ -652,6 +656,7 @@ static const struct ad7380_chip_info ad7384_chip_info = { .num_supplies = ARRAY_SIZE(ad7380_supplies), .vcm_supplies = ad7380_2_channel_vcm_supplies, .num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .available_scan_masks = ad7380_2_channel_scan_masks, .timing_specs = &ad7380_timing, .max_conversion_rate_hz = 4 * MEGA, @@ -665,6 +670,7 @@ static const struct ad7380_chip_info ad7386_chip_info = { .num_simult_channels = 2, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x2_channel_scan_masks, .timing_specs = &ad7380_timing, @@ -679,6 +685,7 @@ static const struct ad7380_chip_info ad7387_chip_info = { .num_simult_channels = 2, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x2_channel_scan_masks, .timing_specs = &ad7380_timing, @@ -693,6 +700,7 @@ static const struct ad7380_chip_info ad7388_chip_info = { .num_simult_channels = 2, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x2_channel_scan_masks, .timing_specs = &ad7380_timing, @@ -721,6 +729,7 @@ static const struct ad7380_chip_info ad7381_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .available_scan_masks = ad7380_4_channel_scan_masks, .timing_specs = &ad7380_4_timing, .max_conversion_rate_hz = 4 * MEGA, @@ -734,6 +743,7 @@ static const struct ad7380_chip_info ad7383_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .vcm_supplies = ad7380_4_channel_vcm_supplies, .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), .available_scan_masks = ad7380_4_channel_scan_masks, @@ -749,6 +759,7 @@ static const struct ad7380_chip_info ad7384_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .vcm_supplies = ad7380_4_channel_vcm_supplies, .num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies), .available_scan_masks = ad7380_4_channel_scan_masks, @@ -764,6 +775,7 @@ static const struct ad7380_chip_info ad7386_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -778,6 +790,7 @@ static const struct ad7380_chip_info ad7387_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -792,6 +805,7 @@ static const struct ad7380_chip_info ad7388_4_chip_info = { .num_simult_channels = 4, .supplies = ad7380_supplies, .num_supplies = ARRAY_SIZE(ad7380_supplies), + .internal_ref_mv = AD7380_INTERNAL_REF_MV, .has_mux = true, .available_scan_masks = ad7380_2x4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -807,6 +821,7 @@ static const struct ad7380_chip_info adaq4370_4_chip_info = { .supplies = adaq4380_supplies, .num_supplies = ARRAY_SIZE(adaq4380_supplies), .internal_ref_only = true, + .internal_ref_mv = ADAQ4380_INTERNAL_REF_MV, .has_hardware_gain = true, .available_scan_masks = ad7380_4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -822,6 +837,7 @@ static const struct ad7380_chip_info adaq4380_4_chip_info = { .supplies = adaq4380_supplies, .num_supplies = ARRAY_SIZE(adaq4380_supplies), .internal_ref_only = true, + .internal_ref_mv = ADAQ4380_INTERNAL_REF_MV, .has_hardware_gain = true, .available_scan_masks = ad7380_4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -837,6 +853,7 @@ static const struct ad7380_chip_info adaq4381_4_chip_info = { .supplies = adaq4380_supplies, .num_supplies = ARRAY_SIZE(adaq4380_supplies), .internal_ref_only = true, + .internal_ref_mv = ADAQ4380_INTERNAL_REF_MV, .has_hardware_gain = true, .available_scan_masks = ad7380_4_channel_scan_masks, .timing_specs = &ad7380_4_timing, @@ -1855,7 +1872,7 @@ static int ad7380_probe(struct spi_device *spi) * in bulk_get_enable(). */ - st->vref_mv = ADAQ4380_INTERNAL_REF_MV; + st->vref_mv = st->chip_info->internal_ref_mv; /* these chips don't have a register bit for this */ external_ref_en = false; @@ -1880,7 +1897,8 @@ static int ad7380_probe(struct spi_device *spi) "Failed to get refio regulator\n"); external_ref_en = ret != -ENODEV; - st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV; + st->vref_mv = external_ref_en ? ret / 1000 + : st->chip_info->internal_ref_mv; } if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv))