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[93.198.131.143]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434da0d6a07sm61383595e9.13.2024.12.06.09.29.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Dec 2024 09:29:15 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Ceclan Dumitru , Conor Dooley , David Lechner , devicetree@vger.kernel.org, Krzysztof Kozlowski , Lars-Peter Clausen , linux-iio@vger.kernel.org, Michael Hennerich , Nuno Sa , Renato Lui Geh , Rob Herring , Trevor Gamblin , Conor Dooley Subject: [PATCH v6 03/10] dt-bindings: iio: adc: adi,ad7{124,173,192,780}: Allow specifications of a gpio for irq line Date: Fri, 6 Dec 2024 18:28:35 +0100 Message-ID: <7fc92a8539e55802d514332e70ee836a3ed08b66.1733504533.git.u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7014; i=u.kleine-koenig@baylibre.com; h=from:subject:message-id; bh=OZ8D5DIA9c2z/ZNslS4oghsCp+4099Z8MVhbXa2hSOo=; b=owGbwMvMwMXY3/A7olbonx/jabUkhvRgEy9HhQPy7z/3H4jRdG3lKcjY3ejzxuBu1/PL26M8C 3PEdk/pZDRmYWDkYpAVU2Sxb1yTaVUlF9m59t9lmEGsTCBTGLg4BWAih15yMMwUUuZL/vQ1+fp7 6fOiARn7zyzPfF9Us5hfXyZErbK1/wiXWPy3aau4lYSnJT05Hr7mB8vVA/8Com9zNO2PCKkVnGv qKvR+tfj9XG+JeW/Fxd1dP06zYwlqtJhpsNJLf+8q4ZXPJsroTm31/bv8UdfedMv0gG+RR+dnT9 tuKbv3uZXsq0MOkzVvCS39x86yb1aUhpCsmbYJq+Cq1Y9CS7JYJ/s1N8cyNZTmrSvstwx/Khjg4 Gd9z6zc5FAV+4zIauNlugmiXSVzZzEyPoxOOPB+SrXn51UzVS9Uy0jpbMhu2P+veJ+EbfuVEssE puiTk2eauOfFXDozX+CqX6G/Vr/rhz+/CvOZGqcm3zADAA== X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip and some of its cousins the logical irq line (R̅D̅Y̅) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Acked-by: Conor Dooley Signed-off-by: Uwe Kleine-König --- .../devicetree/bindings/iio/adc/adi,ad7124.yaml | 13 +++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7173.yaml | 12 ++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7192.yaml | 15 +++++++++++++++ .../devicetree/bindings/iio/adc/adi,ad7780.yaml | 11 +++++++++++ 4 files changed, 51 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 35ed04350e28..7146a654ae38 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,17 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + '#address-cells': const: 1 @@ -111,6 +122,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -121,6 +133,7 @@ examples: spi-max-frequency = <5000000>; interrupts = <25 2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; clocks = <&ad7124_mclk>; clock-names = "mclk"; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml index ad15cf9bc2ff..21ee319d4675 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml @@ -135,6 +135,17 @@ properties: '#clock-cells': const: 0 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]$": type: object @@ -443,6 +454,7 @@ examples: interrupts = <25 IRQ_TYPE_EDGE_FALLING>; interrupt-names = "rdy"; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; spi-max-frequency = <5000000>; gpio-controller; #gpio-cells = <2>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index 66dd1c549bd3..0bd2c6906c83 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -106,6 +106,17 @@ properties: description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + patternProperties: "^channel@[0-9a-f]+$": type: object @@ -181,6 +192,7 @@ unevaluatedProperties: false examples: - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -195,6 +207,7 @@ examples: clock-names = "mclk"; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; @@ -207,6 +220,7 @@ examples: }; }; - | + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -224,6 +238,7 @@ examples: #clock-cells = <0>; interrupts = <25 0x2>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; aincom-supply = <&aincom>; dvdd-supply = <&dvdd>; avdd-supply = <&avdd>; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml index be2616ff9af6..5c8df45bfab0 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml @@ -63,6 +63,17 @@ properties: marked GPIO_ACTIVE_LOW. maxItems: 1 + rdy-gpios: + description: + GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but + highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its + DOUT aka MISO role) and so usually triggers a spurious interrupt. The + distinction between such a spurious event and a real one can only be done + by reading such a GPIO. (There is a register telling the same + information, but accessing that one needs a SPI transfer which then + triggers another interrupt event.) + maxItems: 1 + required: - compatible - reg