| Message ID | e09454c98accd763d6d5e67f9f7262aabec91acd.1736201898.git.Jonathan.Santos@analog.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | iio: adc: ad7768-1: Add features, improvements, and fixes | expand |
On 1/7/25 9:26 AM, Jonathan Santos wrote: > From: Sergiu Cuciurean <sergiu.cuciurean@analog.com> > > The AD7768-1 has the ability to control other local hardware (such as gain > stages),to power down other blocks in the signal chain, or read local > status signals over the SPI interface. > > This change exports the AD7768-1's four gpios and makes them accessible > at an upper layer. We will also need a dt-bindings patch to add gpio-controller and #gpio-cells properties. > > Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com> > --- > drivers/iio/adc/ad7768-1.c | 121 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 121 insertions(+) > > diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c > index 675af9ea856d..9741a6d47942 100644 > --- a/drivers/iio/adc/ad7768-1.c > +++ b/drivers/iio/adc/ad7768-1.c > @@ -10,6 +10,8 @@ > #include <linux/delay.h> > #include <linux/device.h> > #include <linux/err.h> > +#include <linux/gpio.h> > +#include <linux/gpio/driver.h> > #include <linux/gpio/consumer.h> > #include <linux/kernel.h> > #include <linux/module.h> > @@ -77,6 +79,19 @@ > #define AD7768_CONV_MODE_MSK GENMASK(2, 0) > #define AD7768_CONV_MODE(x) FIELD_PREP(AD7768_CONV_MODE_MSK, x) > > +/* AD7768_REG_GPIO_CONTROL */ > +#define AD7768_GPIO_CONTROL_MSK GENMASK(3, 0) > +#define AD7768_GPIO_UNIVERSAL_EN BIT(7) Bits should be ordered highest to lowest (from top to bottom) to be consistent with other code. > + > +/* AD7768_REG_GPIO_WRITE */ > +#define AD7768_GPIO_WRITE_MSK GENMASK(3, 0) > + > +/* AD7768_REG_GPIO_READ */ > +#define AD7768_GPIO_READ_MSK GENMASK(3, 0) > + > +#define AD7768_GPIO_INPUT(x) 0x00 > +#define AD7768_GPIO_OUTPUT(x) BIT(x) > + > #define AD7768_RD_FLAG_MSK(x) (BIT(6) | ((x) & 0x3F)) > #define AD7768_WR_FLAG_MSK(x) ((x) & 0x3F) > > @@ -190,6 +205,8 @@ struct ad7768_state { > struct regulator *vref; > struct mutex lock; > struct clk *mclk; > + struct gpio_chip gpiochip; > + unsigned int gpio_avail_map; > unsigned int mclk_freq; > unsigned int samp_freq; > unsigned int common_mode_voltage; > @@ -338,6 +355,106 @@ static int ad7768_set_dig_fil(struct ad7768_state *st, > return 0; > } > > +static int ad7768_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) > +{ > + struct ad7768_state *st = gpiochip_get_data(chip); > + > + guard(mutex)(&st->lock); As mentioned in another patch, this should be iio_device_claim_direct_mode() instead of st->lock since we can't access registers during a buffered read because the chip is in conversion mode. Same applies to other functions below. > + return ad7768_spi_reg_write_masked(st, > + AD7768_REG_GPIO_CONTROL, > + BIT(offset), > + AD7768_GPIO_INPUT(offset)); > +} > + > +static int ad7768_gpio_direction_output(struct gpio_chip *chip, > + unsigned int offset, int value) > +{ > + struct ad7768_state *st = gpiochip_get_data(chip); > + > + guard(mutex)(&st->lock); > + return ad7768_spi_reg_write_masked(st, > + AD7768_REG_GPIO_CONTROL, > + BIT(offset), > + AD7768_GPIO_OUTPUT(offset)); > +} > + > +static int ad7768_gpio_get(struct gpio_chip *chip, unsigned int offset) > +{ > + struct ad7768_state *st = gpiochip_get_data(chip); > + unsigned int val; > + int ret; > + > + guard(mutex)(&st->lock); > + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_CONTROL, &val, 1); > + if (ret < 0) > + return ret; > + > + if (val & BIT(offset)) > + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_WRITE, &val, 1); > + else > + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_READ, &val, 1); It doesn't work to just always read AD7768_REG_GPIO_READ? > + if (ret < 0) > + return ret; > + > + return !!(val & BIT(offset)); > +} > + > +static void ad7768_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) > +{ > + struct ad7768_state *st = gpiochip_get_data(chip); > + unsigned int val; > + int ret; > + > + guard(mutex)(&st->lock); > + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_CONTROL, &val, 1); > + if (ret < 0) > + return; > + > + if (val & BIT(offset)) > + ad7768_spi_reg_write_masked(st, > + AD7768_REG_GPIO_WRITE, > + BIT(offset), > + (value << offset)); > +} > + > +static int ad7768_gpio_request(struct gpio_chip *chip, unsigned int offset) > +{ > + struct ad7768_state *st = gpiochip_get_data(chip); > + > + if (!(st->gpio_avail_map & BIT(offset))) > + return -ENODEV; > + > + st->gpio_avail_map &= ~BIT(offset); > + > + return 0; > +} > + > +static int ad7768_gpio_init(struct ad7768_state *st) > +{ > + int ret; > + > + ret = ad7768_spi_reg_write(st, > + AD7768_REG_GPIO_CONTROL, nit: this can fit on the previous line > + AD7768_GPIO_UNIVERSAL_EN); > + if (ret < 0) > + return ret; > + > + st->gpio_avail_map = AD7768_GPIO_CONTROL_MSK; > + st->gpiochip.label = "ad7768_1_gpios"; > + st->gpiochip.base = -1; > + st->gpiochip.ngpio = 4; > + st->gpiochip.parent = &st->spi->dev; > + st->gpiochip.can_sleep = true; > + st->gpiochip.direction_input = ad7768_gpio_direction_input; > + st->gpiochip.direction_output = ad7768_gpio_direction_output; > + st->gpiochip.get = ad7768_gpio_get; > + st->gpiochip.set = ad7768_gpio_set; > + st->gpiochip.request = ad7768_gpio_request; > + st->gpiochip.owner = THIS_MODULE; > + > + return gpiochip_add_data(&st->gpiochip, st); > +} > + > static int ad7768_set_freq(struct ad7768_state *st, > unsigned int freq) > { > @@ -538,6 +655,10 @@ static int ad7768_setup(struct ad7768_state *st) > if (IS_ERR(st->gpio_sync_in)) > return PTR_ERR(st->gpio_sync_in); > Since the GPIO pins can also be wired up as mode input pins, this should not be always enabled. We can use the `gpio-controller` DT property as a flag to conditionally enable GPIO support when it is actually wired up for that purpose. > + ret = ad7768_gpio_init(st); > + if (ret < 0) > + return ret; > + > /* Set the default sampling frequency to 32000 kSPS */ > return ad7768_set_freq(st, 32000); > }
diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c index 675af9ea856d..9741a6d47942 100644 --- a/drivers/iio/adc/ad7768-1.c +++ b/drivers/iio/adc/ad7768-1.c @@ -10,6 +10,8 @@ #include <linux/delay.h> #include <linux/device.h> #include <linux/err.h> +#include <linux/gpio.h> +#include <linux/gpio/driver.h> #include <linux/gpio/consumer.h> #include <linux/kernel.h> #include <linux/module.h> @@ -77,6 +79,19 @@ #define AD7768_CONV_MODE_MSK GENMASK(2, 0) #define AD7768_CONV_MODE(x) FIELD_PREP(AD7768_CONV_MODE_MSK, x) +/* AD7768_REG_GPIO_CONTROL */ +#define AD7768_GPIO_CONTROL_MSK GENMASK(3, 0) +#define AD7768_GPIO_UNIVERSAL_EN BIT(7) + +/* AD7768_REG_GPIO_WRITE */ +#define AD7768_GPIO_WRITE_MSK GENMASK(3, 0) + +/* AD7768_REG_GPIO_READ */ +#define AD7768_GPIO_READ_MSK GENMASK(3, 0) + +#define AD7768_GPIO_INPUT(x) 0x00 +#define AD7768_GPIO_OUTPUT(x) BIT(x) + #define AD7768_RD_FLAG_MSK(x) (BIT(6) | ((x) & 0x3F)) #define AD7768_WR_FLAG_MSK(x) ((x) & 0x3F) @@ -190,6 +205,8 @@ struct ad7768_state { struct regulator *vref; struct mutex lock; struct clk *mclk; + struct gpio_chip gpiochip; + unsigned int gpio_avail_map; unsigned int mclk_freq; unsigned int samp_freq; unsigned int common_mode_voltage; @@ -338,6 +355,106 @@ static int ad7768_set_dig_fil(struct ad7768_state *st, return 0; } +static int ad7768_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) +{ + struct ad7768_state *st = gpiochip_get_data(chip); + + guard(mutex)(&st->lock); + return ad7768_spi_reg_write_masked(st, + AD7768_REG_GPIO_CONTROL, + BIT(offset), + AD7768_GPIO_INPUT(offset)); +} + +static int ad7768_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct ad7768_state *st = gpiochip_get_data(chip); + + guard(mutex)(&st->lock); + return ad7768_spi_reg_write_masked(st, + AD7768_REG_GPIO_CONTROL, + BIT(offset), + AD7768_GPIO_OUTPUT(offset)); +} + +static int ad7768_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct ad7768_state *st = gpiochip_get_data(chip); + unsigned int val; + int ret; + + guard(mutex)(&st->lock); + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_CONTROL, &val, 1); + if (ret < 0) + return ret; + + if (val & BIT(offset)) + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_WRITE, &val, 1); + else + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_READ, &val, 1); + if (ret < 0) + return ret; + + return !!(val & BIT(offset)); +} + +static void ad7768_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) +{ + struct ad7768_state *st = gpiochip_get_data(chip); + unsigned int val; + int ret; + + guard(mutex)(&st->lock); + ret = ad7768_spi_reg_read(st, AD7768_REG_GPIO_CONTROL, &val, 1); + if (ret < 0) + return; + + if (val & BIT(offset)) + ad7768_spi_reg_write_masked(st, + AD7768_REG_GPIO_WRITE, + BIT(offset), + (value << offset)); +} + +static int ad7768_gpio_request(struct gpio_chip *chip, unsigned int offset) +{ + struct ad7768_state *st = gpiochip_get_data(chip); + + if (!(st->gpio_avail_map & BIT(offset))) + return -ENODEV; + + st->gpio_avail_map &= ~BIT(offset); + + return 0; +} + +static int ad7768_gpio_init(struct ad7768_state *st) +{ + int ret; + + ret = ad7768_spi_reg_write(st, + AD7768_REG_GPIO_CONTROL, + AD7768_GPIO_UNIVERSAL_EN); + if (ret < 0) + return ret; + + st->gpio_avail_map = AD7768_GPIO_CONTROL_MSK; + st->gpiochip.label = "ad7768_1_gpios"; + st->gpiochip.base = -1; + st->gpiochip.ngpio = 4; + st->gpiochip.parent = &st->spi->dev; + st->gpiochip.can_sleep = true; + st->gpiochip.direction_input = ad7768_gpio_direction_input; + st->gpiochip.direction_output = ad7768_gpio_direction_output; + st->gpiochip.get = ad7768_gpio_get; + st->gpiochip.set = ad7768_gpio_set; + st->gpiochip.request = ad7768_gpio_request; + st->gpiochip.owner = THIS_MODULE; + + return gpiochip_add_data(&st->gpiochip, st); +} + static int ad7768_set_freq(struct ad7768_state *st, unsigned int freq) { @@ -538,6 +655,10 @@ static int ad7768_setup(struct ad7768_state *st) if (IS_ERR(st->gpio_sync_in)) return PTR_ERR(st->gpio_sync_in); + ret = ad7768_gpio_init(st); + if (ret < 0) + return ret; + /* Set the default sampling frequency to 32000 kSPS */ return ad7768_set_freq(st, 32000); }