From patchwork Sun Aug 25 22:45:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zubair Lutfullah X-Patchwork-Id: 2849341 Return-Path: X-Original-To: patchwork-linux-input@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 80610BF546 for ; Sun, 25 Aug 2013 22:46:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 770CF2013A for ; Sun, 25 Aug 2013 22:46:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4A32420136 for ; Sun, 25 Aug 2013 22:46:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756687Ab3HYWpc (ORCPT ); Sun, 25 Aug 2013 18:45:32 -0400 Received: from mail-ee0-f46.google.com ([74.125.83.46]:59556 "EHLO mail-ee0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756667Ab3HYWpa (ORCPT ); Sun, 25 Aug 2013 18:45:30 -0400 Received: by mail-ee0-f46.google.com with SMTP id c13so1263807eek.19 for ; Sun, 25 Aug 2013 15:45:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=yXvb9famAgIWQR/NYe5wb/XdzNzMFXOk/LwImW+Stzg=; b=PV/UA8PM+cclGuLmrHd+bYQ0c5NmNVsGv9EPjm4OvhWQLADLmnmO0UBzJERaQChUEa 4aVXC9j8m1vIj1zS+CpNnbiseDPS08xEOxb7B3M1uFKyvyzacHhR+GQMiGJ1dEmUT+Z7 +Gs6D9ciCrBoTGp/3H798aUTn3fP9NK5vusRbafmcrMIkyz0wCWmjtgYNSExCwYRR9x1 N2lG0vA9TQmQTH/ITZ0pS0dilLlVjG445/yxNhtWA2E639kpqhE15dZrbeKGP4AZk6em zNklrYm2nnXtUpdGSuY/UuN3qUlfno53oYmXBsRi2pj0+m63Ul7It0z/XE6lCHa2XyqI lPFw== X-Received: by 10.14.183.2 with SMTP id p2mr8931135eem.44.1377470729296; Sun, 25 Aug 2013 15:45:29 -0700 (PDT) Received: from localhost.localdomain (cpc3-seac14-0-0-cust157.7-2.cable.virginmedia.com. [81.97.204.158]) by mx.google.com with ESMTPSA id z12sm16901301eev.6.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 25 Aug 2013 15:45:28 -0700 (PDT) From: Zubair Lutfullah To: jic23@cam.ac.uk, lee.jones@linaro.org Cc: bigeasy@linutronix.de, linux-iio@vger.kernel.org, linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, gregkh@linuxfoundation.org Subject: =?UTF-8?q?=5BPATCH=201/2=5D=20input=3A=20ti=5Fam335x=5Ftsc=3A=20Enable=20shared=20IRQ=20for=20TSC?= Date: Sun, 25 Aug 2013 23:45:23 +0100 Message-Id: <1377470724-15710-2-git-send-email-zubair.lutfullah@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1377470724-15710-1-git-send-email-zubair.lutfullah@gmail.com> References: <1377470724-15710-1-git-send-email-zubair.lutfullah@gmail.com> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable shared IRQ to allow ADC to share IRQ line from parent MFD core. Only FIFO0 IRQs are for TSC and handled on the TSC side. Step mask would be updated from cached variable only previously. In rare cases when both TSC and ADC are used, the cached variable gets mixed up. The step mask is written with the required mask every time. Rachna Patil (TI) laid ground work for shared IRQ. Signed-off-by: Zubair Lutfullah --- drivers/input/touchscreen/ti_am335x_tsc.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c b/drivers/input/touchscreen/ti_am335x_tsc.c index e1c5300..4124e580 100644 --- a/drivers/input/touchscreen/ti_am335x_tsc.c +++ b/drivers/input/touchscreen/ti_am335x_tsc.c @@ -52,6 +52,7 @@ struct titsc { u32 config_inp[4]; u32 bit_xp, bit_xn, bit_yp, bit_yn; u32 inp_xp, inp_xn, inp_yp, inp_yn; + u32 step_mask; }; static unsigned int titsc_readl(struct titsc *ts, unsigned int reg) @@ -196,7 +197,8 @@ static void titsc_step_config(struct titsc *ts_dev) /* The steps1 … end and bit 0 for TS_Charge */ stepenable = (1 << (end_step + 2)) - 1; - am335x_tsc_se_set(ts_dev->mfd_tscadc, stepenable); + ts_dev->step_mask = stepenable; + am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask); } static void titsc_read_coordinates(struct titsc *ts_dev, @@ -260,6 +262,10 @@ static irqreturn_t titsc_irq(int irq, void *dev) unsigned int fsm; status = titsc_readl(ts_dev, REG_IRQSTATUS); + /* + * ADC and touchscreen share the IRQ line. + * FIFO1 interrupts are used by ADC. Handle FIFO0 IRQs here only + */ if (status & IRQENB_FIFO0THRES) { titsc_read_coordinates(ts_dev, &x, &y, &z1, &z2); @@ -315,11 +321,17 @@ static irqreturn_t titsc_irq(int irq, void *dev) } if (irqclr) { - titsc_writel(ts_dev, REG_IRQSTATUS, irqclr); - am335x_tsc_se_update(ts_dev->mfd_tscadc); - return IRQ_HANDLED; + titsc_writel(ts_dev, REG_IRQSTATUS, (status | irqclr)); + am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask); } - return IRQ_NONE; + + /* If any IRQ flags left, return none. So ADC can handle its IRQs */ + status = titsc_readl(ts_dev, REG_IRQSTATUS); + if (status == false) + return IRQ_HANDLED; + else + return IRQ_NONE; + } static int titsc_parse_dt(struct platform_device *pdev, @@ -389,7 +401,7 @@ static int titsc_probe(struct platform_device *pdev) } err = request_irq(ts_dev->irq, titsc_irq, - 0, pdev->dev.driver->name, ts_dev); + IRQF_SHARED, pdev->dev.driver->name, ts_dev); if (err) { dev_err(&pdev->dev, "failed to allocate irq.\n"); goto err_free_mem;