From patchwork Thu Sep 19 06:24:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zubair Lutfullah X-Patchwork-Id: 2910001 Return-Path: X-Original-To: patchwork-linux-input@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 62CDA9F1BF for ; Thu, 19 Sep 2013 06:25:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 974C520425 for ; Thu, 19 Sep 2013 06:25:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C42FF20424 for ; Thu, 19 Sep 2013 06:25:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752809Ab3ISGYx (ORCPT ); Thu, 19 Sep 2013 02:24:53 -0400 Received: from mail-we0-f182.google.com ([74.125.82.182]:63469 "EHLO mail-we0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752532Ab3ISGYv (ORCPT ); Thu, 19 Sep 2013 02:24:51 -0400 Received: by mail-we0-f182.google.com with SMTP id q59so7638362wes.27 for ; Wed, 18 Sep 2013 23:24:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=gIUrgVm9MmsF03Ajxz7JiodF8/oC+tV6fPRHcs7SwLc=; b=mwnaFy4W6WlInoYMaDxTqMOCzAL+RlKQI1dx7z4ABjtLuugFotZSD5INlwHXpotCHq +miBopW2mw6D0SRpwortEImpXm8B96sx8Mk+6e+8JtiVcGrq6M2QkqvkAma6ucYdQ1qP QZB9OgTUpgNCLQ8m5NfT9GljAlyQU0tw7lmJ4r8NFfOXzLOMNQm6UH4FGeB3vv35My0T y3+nNLeHxSuJysxNdRTCQVm95UeDZoZ9w7hqZcg5J+doQ8GoMzX5QOoVav11O+dyNBpO ak30AWNr/CayebMDGLremgn9FHVRBxaDMEtrJJoCO9jukPL7R3DAB2fCKgX1vdiJOjV8 ZSjQ== X-Received: by 10.194.87.36 with SMTP id u4mr34359wjz.64.1379571890075; Wed, 18 Sep 2013 23:24:50 -0700 (PDT) Received: from localhost.localdomain ([182.185.82.209]) by mx.google.com with ESMTPSA id li9sm7104429wic.4.1969.12.31.16.00.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Sep 2013 23:24:49 -0700 (PDT) From: Zubair Lutfullah To: jic23@cam.ac.uk, dmitry.torokhov@gmail.com Cc: linux-iio@vger.kernel.org, linux-input@vger.kernel.org, linux-kernel@vger.kernel.org, bigeasy@linutronix.de, gregkh@linuxfoundation.org, zubair.lutfullah@gmail.com Subject: =?UTF-8?q?=5BPATCH=201/3=5D=20input=3A=20ti=5Fam335x=5Ftsc=3A=20Enable=20shared=20IRQ=20for=20TSC?= Date: Thu, 19 Sep 2013 11:24:33 +0500 Message-Id: <1379571876-12420-2-git-send-email-zubair.lutfullah@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1379571876-12420-1-git-send-email-zubair.lutfullah@gmail.com> References: <1379571876-12420-1-git-send-email-zubair.lutfullah@gmail.com> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Enable shared IRQ to allow ADC to share IRQ line from parent MFD core. Only FIFO0 IRQs are for TSC and handled on the TSC side. Step mask would be updated from cached variable only previously. In rare cases when both TSC and ADC are used, the cached variable gets mixed up. The step mask is written with the required mask every time. Rachna Patil (TI) laid ground work for shared IRQ. Signed-off-by: Zubair Lutfullah Acked-by: Dmitry Torokhov --- drivers/input/touchscreen/ti_am335x_tsc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c b/drivers/input/touchscreen/ti_am335x_tsc.c index e1c5300..24e625c 100644 --- a/drivers/input/touchscreen/ti_am335x_tsc.c +++ b/drivers/input/touchscreen/ti_am335x_tsc.c @@ -52,6 +52,7 @@ struct titsc { u32 config_inp[4]; u32 bit_xp, bit_xn, bit_yp, bit_yn; u32 inp_xp, inp_xn, inp_yp, inp_yn; + u32 step_mask; }; static unsigned int titsc_readl(struct titsc *ts, unsigned int reg) @@ -196,7 +197,8 @@ static void titsc_step_config(struct titsc *ts_dev) /* The steps1 … end and bit 0 for TS_Charge */ stepenable = (1 << (end_step + 2)) - 1; - am335x_tsc_se_set(ts_dev->mfd_tscadc, stepenable); + ts_dev->step_mask = stepenable; + am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask); } static void titsc_read_coordinates(struct titsc *ts_dev, @@ -260,6 +262,10 @@ static irqreturn_t titsc_irq(int irq, void *dev) unsigned int fsm; status = titsc_readl(ts_dev, REG_IRQSTATUS); + /* + * ADC and touchscreen share the IRQ line. + * FIFO1 interrupts are used by ADC. Handle FIFO0 IRQs here only + */ if (status & IRQENB_FIFO0THRES) { titsc_read_coordinates(ts_dev, &x, &y, &z1, &z2); @@ -316,7 +322,7 @@ static irqreturn_t titsc_irq(int irq, void *dev) if (irqclr) { titsc_writel(ts_dev, REG_IRQSTATUS, irqclr); - am335x_tsc_se_update(ts_dev->mfd_tscadc); + am335x_tsc_se_set(ts_dev->mfd_tscadc, ts_dev->step_mask); return IRQ_HANDLED; } return IRQ_NONE; @@ -389,7 +395,7 @@ static int titsc_probe(struct platform_device *pdev) } err = request_irq(ts_dev->irq, titsc_irq, - 0, pdev->dev.driver->name, ts_dev); + IRQF_SHARED, pdev->dev.driver->name, ts_dev); if (err) { dev_err(&pdev->dev, "failed to allocate irq.\n"); goto err_free_mem;