From patchwork Fri Dec 9 20:57:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Torokhov X-Patchwork-Id: 9469007 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 338F060586 for ; Fri, 9 Dec 2016 20:58:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 259AE28697 for ; Fri, 9 Dec 2016 20:58:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1A33228698; Fri, 9 Dec 2016 20:58:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A336228683 for ; Fri, 9 Dec 2016 20:58:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932110AbcLIU5t (ORCPT ); Fri, 9 Dec 2016 15:57:49 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:33114 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751334AbcLIU5r (ORCPT ); Fri, 9 Dec 2016 15:57:47 -0500 Received: by mail-pg0-f68.google.com with SMTP id 3so3326184pgd.0; Fri, 09 Dec 2016 12:57:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ktggZ9ZItjps/Y/x5WMl73G/MQm2hCvVT5DPsXsq1aQ=; b=QeI9RrM+rVS2EtQ/rgriNlVI2dW1W6cfYW9v4vGk6T9T5D7HfQ681hcyPRWPFFX3JU eTQORL/xvNhWkw3b7lLj45xA4rFnGNVe1XICsWAkgg64flkfGVQwAbWJ27CyMVaxFVR9 vovvYwaAv8otQ69y9gxruq73P1Lx32oZdg3bZwZrMG8ocmvI9LoCIMT7BGBMgfx4lgsu GnZbo2FMbNn0chA9WnuZTCigx2iLwgZRhk6lHjjfCRXzMnlBi8NPDixb4bjoZ1m3Ftsi ZzEK+uWDmarAIanmqeXP8mJsV6tWrIa3zqvhe/W5RGFTC1TMCoiaQ03CIHz7WD5pR5E8 j87A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ktggZ9ZItjps/Y/x5WMl73G/MQm2hCvVT5DPsXsq1aQ=; b=DoGkVav0qu2+s9Cz20XR64m3zQdAiPvxzA+cre0TuH5zArlFq4ibNkp7et94+HMspY 7wK1873q/qs+qsZIwaybDfU7pCMDUrDAnAT+f+7pfjN4U7P6EnIFqE3CbJo1VR7fnu6N gaC9SgRJyy4jNnmbP6Ny+wbu2gse2dx+qMlkY7wudYkr/Z7C6MJ0qFzGF8Tr3aHtDIs3 tpeZ2CcBnerZzwHabk1WCXjH4U/5TfIdrm4BxmONtrfrTWTc7fbOJUBm8o7i3DUL6b91 lzKnK7qQwydw2yF9msZiXHv+4jTjZBdZr8io+8KsSb+uU702WOBpD2W0JI1TzvJJcyq8 v65A== X-Gm-Message-State: AKaTC03ffUO1GdiY0vAm1cNIYeQ/1xmIHGBxyUt1grgmYBTDjqtz6iWGLtWZvTmzwjcDSw== X-Received: by 10.99.135.200 with SMTP id i191mr146601044pge.18.1481317066768; Fri, 09 Dec 2016 12:57:46 -0800 (PST) Received: from dtor-ws.mtv.corp.google.com ([172.22.152.27]) by smtp.gmail.com with ESMTPSA id q14sm59586576pfa.40.2016.12.09.12.57.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Dec 2016 12:57:46 -0800 (PST) From: Dmitry Torokhov To: Thomas Gleixner , Ingo Molnar Cc: "H. Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org, linux-input@vger.kernel.org, Takashi Iwai , Marcos Paulo de Souza Subject: [PATCH 3/4] x86/init: remove i8042_detect() form platform ops Date: Fri, 9 Dec 2016 12:57:40 -0800 Message-Id: <1481317061-31486-4-git-send-email-dmitry.torokhov@gmail.com> X-Mailer: git-send-email 2.8.0.rc3.226.g39d4020 In-Reply-To: <1481317061-31486-1-git-send-email-dmitry.torokhov@gmail.com> References: <1481317061-31486-1-git-send-email-dmitry.torokhov@gmail.com> Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Now that i8042 uses flag in legacy platform data, i8042_detect() is no longer used and can be removed. Signed-off-by: Dmitry Torokhov --- arch/x86/include/asm/x86_init.h | 2 -- arch/x86/kernel/x86_init.c | 2 -- arch/x86/platform/ce4100/ce4100.c | 6 ------ arch/x86/platform/intel-mid/intel-mid.c | 7 ------- 4 files changed, 17 deletions(-) diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index c4d09c7..85b2ae5 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -206,7 +206,6 @@ struct x86_legacy_features { * @set_wallclock: set time back to HW clock * @is_untracked_pat_range exclude from PAT logic * @nmi_init enable NMI on cpus - * @i8042_detect pre-detect if i8042 controller exists * @save_sched_clock_state: save state for sched_clock() on suspend * @restore_sched_clock_state: restore state for sched_clock() on resume * @apic_post_init: adjust apic if neeeded @@ -228,7 +227,6 @@ struct x86_platform_ops { bool (*is_untracked_pat_range)(u64 start, u64 end); void (*nmi_init)(void); unsigned char (*get_nmi_reason)(void); - int (*i8042_detect)(void); void (*save_sched_clock_state)(void); void (*restore_sched_clock_state)(void); void (*apic_post_init)(void); diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 76c5e52..ca85d20 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -89,7 +89,6 @@ struct x86_cpuinit_ops x86_cpuinit = { }; static void default_nmi_init(void) { }; -static int default_i8042_detect(void) { return 1; }; struct x86_platform_ops x86_platform = { .calibrate_cpu = native_calibrate_cpu, @@ -100,7 +99,6 @@ struct x86_platform_ops x86_platform = { .is_untracked_pat_range = is_ISA_range, .nmi_init = default_nmi_init, .get_nmi_reason = default_get_nmi_reason, - .i8042_detect = default_i8042_detect, .save_sched_clock_state = tsc_save_sched_clock_state, .restore_sched_clock_state = tsc_restore_sched_clock_state, }; diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c index b27bccd..a783caf 100644 --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -23,11 +23,6 @@ #include #include -static int ce4100_i8042_detect(void) -{ - return 0; -} - /* * The CE4100 platform has an internal 8051 Microcontroller which is * responsible for signaling to the external Power Management Unit the @@ -145,7 +140,6 @@ static void sdv_pci_init(void) void __init x86_ce4100_early_setup(void) { x86_init.oem.arch_setup = sdv_arch_setup; - x86_platform.i8042_detect = ce4100_i8042_detect; x86_init.resources.probe_roms = x86_init_noop; x86_init.mpparse.get_smp_config = x86_init_uint_noop; x86_init.mpparse.find_smp_config = x86_init_noop; diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index ce119d2..cf8ff1c 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -156,12 +156,6 @@ out: regulator_has_full_constraints(); } -/* MID systems don't have i8042 controller */ -static int intel_mid_i8042_detect(void) -{ - return 0; -} - /* * Moorestown does not have external NMI source nor port 0x61 to report * NMI status. The possible NMI sources are from pmu as a result of NMI @@ -192,7 +186,6 @@ void __init x86_intel_mid_early_setup(void) x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock; x86_platform.calibrate_tsc = intel_mid_calibrate_tsc; - x86_platform.i8042_detect = intel_mid_i8042_detect; x86_init.timers.wallclock_init = intel_mid_rtc_init; x86_platform.get_nmi_reason = intel_mid_get_nmi_reason;