From patchwork Wed Oct 13 06:28:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 12554907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB411C433F5 for ; Wed, 13 Oct 2021 06:29:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A723761027 for ; Wed, 13 Oct 2021 06:29:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231358AbhJMGbI (ORCPT ); Wed, 13 Oct 2021 02:31:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229777AbhJMGbI (ORCPT ); Wed, 13 Oct 2021 02:31:08 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55928C061714 for ; Tue, 12 Oct 2021 23:29:05 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1maXl4-0006zJ-73; Wed, 13 Oct 2021 08:28:58 +0200 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1maXl1-0005F4-OF; Wed, 13 Oct 2021 08:28:55 +0200 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1maXl1-0006Pu-N6; Wed, 13 Oct 2021 08:28:55 +0200 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Dmitry Torokhov Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , Shawn Guo , NXP Linux Team , kernel@pengutronix.de, linux-input@vger.kernel.org Subject: [PATCH v2] Input: snvs_pwrkey - Add clk handling Date: Wed, 13 Oct 2021 08:28:48 +0200 Message-Id: <20211013062848.2667192-1-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: References: MIME-Version: 1.0 X-Patch-Hashes: v=1; h=sha256; i=8JEC9qWxA9J2PUg0PTv7WfZdxr0e8sHBys7YS0hRcZ8=; m=ZSCscfW1kNsEKkMpUkLsQz442RNF2ZAWxTwuboFAW68=; p=nAUMDK1vDFyc7dpUZhZgecmMhX/i9B5BqKjW53gOiKw=; g=8f00763b44a210b9b1d8c40c9188d0a6600c2bfb X-Patch-Sig: m=pgp; i=u.kleine-koenig@pengutronix.de; s=0x0D2511F322BFAB1C1580266BE2DCDD9132669BD6; b=iQEzBAABCgAdFiEEfnIqFpAYrP8+dKQLwfwUeK3K7AkFAmFmfJwACgkQwfwUeK3K7Ami/Af/eDO ZtXbnCD99kXxgRIs3dHmsyrMyK+783JYJ4m1Xhdq3fmO0RhS4p7nobczK5YpHwfodSwjiowUoeLEc 8DYoqnjyuAufVKWyd05UP67boJdkdfJwgebCwMyb4eNsA+iYtmXU9v7evVlgzZESESUj2Rz+qRwhV QXg2dnH8lW5BpWDCGhAfvK4yLtwIoCHMg2DSKbk09RVdcEupJliLQu17PJAr5q2pw6wrPMxhitHzj jQUOcUSpnIb2NuD7uPKzh0I8o4qyb4q6yCtGEGmARpJNgIASwhOeE6atw1Tw98sf36q4NDEPlu36g 9nYVPaBPeqQeHXNCSfAE5EI+OKOha8Q== X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-input@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org On i.MX7S and i.MX8M* (but not i.MX6*) the pwrkey device has an associated clock. Accessing the registers requires that this clock is enabled. Binding the driver on at least i.MX7S and i.MX8MP while not having the clock enabled results in a complete hang of the machine. (This usually only happens if snvs_pwrkey is built as a module and the rtc-snvs driver isn't already bound because at bootup the required clk is on and only gets disabled when the clk framework disables unused clks late during boot.) This completes the fix in commit 135be16d3505 ("ARM: dts: imx7s: add snvs clock to pwrkey"). Signed-off-by: Uwe Kleine-König --- Changes since (implicit) v1: Don't use dev_err_probe() to please Dmitry. Best regards Uwe drivers/input/keyboard/snvs_pwrkey.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index 2f5e3ab5ed63..ea46f42b067d 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -3,6 +3,7 @@ // Driver for the IMX SNVS ON/OFF Power Key // Copyright (C) 2015 Freescale Semiconductor, Inc. All Rights Reserved. +#include #include #include #include @@ -99,6 +100,11 @@ static irqreturn_t imx_snvs_pwrkey_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } +static void imx_snvs_pwrkey_disable_clk(void *data) +{ + clk_disable_unprepare(data); +} + static void imx_snvs_pwrkey_act(void *pdata) { struct pwrkey_drv_data *pd = pdata; @@ -111,6 +117,7 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) struct pwrkey_drv_data *pdata; struct input_dev *input; struct device_node *np; + struct clk *clk; int error; u32 vid; @@ -134,6 +141,26 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "KEY_POWER without setting in dts\n"); } + clk = devm_clk_get_optional(&pdev->dev, NULL); + if (IS_ERR(clk)) { + dev_err(&pdev->dev, "Failed to get snvs clock (%pe)\n", clk); + return PTR_ERR(clk); + } + + error = clk_prepare_enable(clk); + if (error) { + dev_err(&pdev->dev, "Failed to enable snvs clock (%pe)\n", + ERR_PTR(error)); + return error; + } + + error = devm_add_action_or_reset(&pdev->dev, imx_snvs_pwrkey_disable_clk, clk); + if (error) { + dev_err(&pdev->dev, "Failed to register clock cleanup handler (%pe)\n", + ERR_PTR(error)); + return error; + } + pdata->wakeup = of_property_read_bool(np, "wakeup-source"); pdata->irq = platform_get_irq(pdev, 0);