From patchwork Tue Oct 4 08:08:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 12997992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0BE4EC43219 for ; Tue, 4 Oct 2022 08:08:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229908AbiJDII4 (ORCPT ); Tue, 4 Oct 2022 04:08:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47290 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229975AbiJDIIj (ORCPT ); Tue, 4 Oct 2022 04:08:39 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F0224198E for ; Tue, 4 Oct 2022 01:08:37 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id c3-20020a1c3503000000b003bd21e3dd7aso296074wma.1 for ; Tue, 04 Oct 2022 01:08:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date; bh=qZ19bsx/kaW5RSDlaveR/Z1oAoKv9fyzJ240tQu1a9s=; b=wpyNA+Q3dmNDSH54NYgAELyzeib0IEOVsF6nbjCLXTfb9wBTET57L2josQcJXuqA0E K6nJxHko8cIkjsnUD8tiJe8mTZsKy+SO6TpkN5UR3uuPSRAgDuW0TV4KtUGMJjTw8fLg ZUZEB0vB7+dM+5X2lZNOK72DLwCzt5gRN0nrqknMUAZHKzJxxA9fGXTBGOsJo7f5DC5j nehhYtTyeFFl8lQV1MEyAvkg6CkMddVJsuLuwtvX5t+Jdr72b7sFw8wCEnBhDwsgy8fD 6qBgaoOa6hvnS0YHuAcK6JqmziXF3VLhtTbtNADZKHv4zDJvRvrus1A2YemhXurs/2nr Ry/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date; bh=qZ19bsx/kaW5RSDlaveR/Z1oAoKv9fyzJ240tQu1a9s=; b=Df6L/1FIm09IyHJQP8IVtT+pf40uvMZHT3EzpuzkpIRdiCUdS479iwKfJWCGanOuak 9tG0GzxKgAzUyvsSOc7E7BiJi1+eYHdyAqQo7HJ4ZfbxJ0EKVRDGuh4lUGkbE+8enKjE R1ZToUAGErqe2tlfq3hLoXC/rqj5n+Z+0JU2IsNRVfUnGHfgkDtISY2BeCgCHOt11X77 WgnfMJw3WYklBH2CKo+5+xbUTp/I3wsdEE8DDklnhzSWFSUP51hCLiW1l448IZPxoJcA orSR5WStkxaBA1ladihgIapOc/YE5+A8SS1GnR2UvGLrSS4qsOo3BsdiXx8FQYlRzc3Z jP1w== X-Gm-Message-State: ACrzQf11h2lweeHEOJ6BkGYnzxgkB9zMEbsIxVydFte9OufT0fxVw7DR Gg9m0D+GOaIDAZZpYCaVtdV7zA== X-Google-Smtp-Source: AMsMyM5JBji6og2zUI0F155nozCgsevHcka5zAZ8mXvn02oWmuomNow9V4CUQM/TC/MALKgVWwIVeA== X-Received: by 2002:a05:600c:4f82:b0:3b4:a6fc:89d2 with SMTP id n2-20020a05600c4f8200b003b4a6fc89d2mr9245861wmq.53.1664870916439; Tue, 04 Oct 2022 01:08:36 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id l2-20020a1c7902000000b003b33943ce5esm20228866wme.32.2022.10.04.01.08.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Oct 2022 01:08:35 -0700 (PDT) From: Neil Armstrong Date: Tue, 04 Oct 2022 08:08:27 +0000 Subject: [PATCH v2 11/11] arm: dts: qcom: mdm9615: remove useless amba subnode MIME-Version: 1.0 Message-Id: <20220928-mdm9615-dt-schema-fixes-v2-11-87fbeb4ae053@linaro.org> References: <20220928-mdm9615-dt-schema-fixes-v2-0-87fbeb4ae053@linaro.org> In-Reply-To: <20220928-mdm9615-dt-schema-fixes-v2-0-87fbeb4ae053@linaro.org> To: Krzysztof Kozlowski , Bjorn Andersson , Satya Priya , Andy Gross , Alexandre Belloni , Rob Herring , Konrad Dybcio , Lee Jones , Dmitry Torokhov , Alessandro Zummo Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Bjorn Andersson , linux-input@vger.kernel.org, Krzysztof Kozlowski , Neil Armstrong , linux-arm-msm@vger.kernel.org, linux-rtc@vger.kernel.org X-Mailer: b4 0.10.0 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org The separate amba device node doesn't add anything significant to the DT. The OF parsing code already creates amba_device or platform_device depending on the compatibility lists. Signed-off-by: Neil Armstrong Acked-by: Krzysztof Kozlowski diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index 9d950f96280d..482fd246321c 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -314,49 +314,43 @@ sdcc2bam: dma-controller@12142000{ qcom,ee = <0>; }; - amba { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - sdcc1: mmc@12180000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - reg = <0x12180000 0x2000>; - interrupts = ; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <48000000>; - cap-sd-highspeed; - cap-mmc-highspeed; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; - dma-names = "tx", "rx"; - assigned-clocks = <&gcc SDC1_CLK>; - assigned-clock-rates = <400000>; - }; + sdcc1: mmc@12180000 { + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + reg = <0x12180000 0x2000>; + interrupts = ; + clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <8>; + max-frequency = <48000000>; + cap-sd-highspeed; + cap-mmc-highspeed; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; + assigned-clocks = <&gcc SDC1_CLK>; + assigned-clock-rates = <400000>; + }; - sdcc2: mmc@12140000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12140000 0x2000>; - interrupts = ; - clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <4>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <48000000>; - no-1-8-v; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc2bam 2>, <&sdcc2bam 1>; - dma-names = "tx", "rx"; - assigned-clocks = <&gcc SDC2_CLK>; - assigned-clock-rates = <400000>; - }; + sdcc2: mmc@12140000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x12140000 0x2000>; + interrupts = ; + clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + no-1-8-v; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc2bam 2>, <&sdcc2bam 1>; + dma-names = "tx", "rx"; + assigned-clocks = <&gcc SDC2_CLK>; + assigned-clock-rates = <400000>; }; tcsr: syscon@1a400000 {