From patchwork Mon Oct 31 16:02:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Twiss X-Patchwork-Id: 9405833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8A87460588 for ; Mon, 31 Oct 2016 16:16:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7292C2925D for ; Mon, 31 Oct 2016 16:16:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 657482933B; Mon, 31 Oct 2016 16:16:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 174152925D for ; Mon, 31 Oct 2016 16:16:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762727AbcJaQQY (ORCPT ); Mon, 31 Oct 2016 12:16:24 -0400 Received: from mail1.bemta5.messagelabs.com ([195.245.231.148]:47565 "EHLO mail1.bemta5.messagelabs.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758847AbcJaQPq (ORCPT ); Mon, 31 Oct 2016 12:15:46 -0400 Received: from [85.158.139.35] by server-12.bemta-5.messagelabs.com id E3/29-27365-D2E67185; Mon, 31 Oct 2016 16:15:41 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIKsWRWlGSWpSXmKPExsUSt3Opsa5mnni EQdM3WYupD5+wWcw/co7V4vCiF4wW869cY7W4//Uoo8W3Kx1MFjc/fWO1uLxrDpvF594jjBY3 1u1jt3iy8AyTxdLrF5ksWvceAXIf9rFZXJ7YyW5xa8YLVgcBjzXz1jB67Jx1l93j2mYxj8V7X jJ5bFrVyeZx59oeNo+d3xvYPT5vkgvgiGLNzEvKr0hgzVj55T9jwYHZjBV33hk2ME5tZuxi5O IQEljPKLF57jGWLkZOIKdCYuWfVWwgNq9AssTBqxuA4hwcnAKOEl+6XCBKHCR2XrwCVsImYCg x7817RhCbRUBVYlrfWSYQW1jAVOLO1NtgI0UEgiSWNzSwgOxiFtjIIvFnwkImiPmCEidnPgEr YhaQkDj44gUzyC4hAS2J5cciQcISAvYS099fBQtLCOhLNB6LhQgbSnyf9Y0FwjaXaFjUyTiBU XAWkqGzkAxdwMi0ilGjOLWoLLVI19BQL6koMz2jJDcxM0fX0MBULze1uDgxPTUnMalYLzk/dx MjMOoYgGAH48p250OMkhxMSqK8X8PEI4T4kvJTKjMSizPii0pzUosPMcpwcChJ8O7OAcoJFqW mp1akZeYA4x8mLcHBoyTC2wWS5i0uSMwtzkyHSJ1iVJQS5z0MkhAASWSU5sG1wVLOJUZZKWFe RqBDhHgKUotyM0tQ5V8xinMwKgnz9oFM4cnMK4Gb/gpoMRPQ4rRCEZDFJYkIKakGxmn5y5NeJ /m/X7yiYRmX9nOtlFeF3r/3Xew/c9xhfum53SuXBH6cvJq71HGaCYvtxJYPB9Rb2p/ZMK2wDn 27/9/yNVn/LTZFHDcK+Ll+0vp4kYefF5hGvKneH9nWd+0CU4kYt6OQdlS+jvLX0KBeH9tlmR8 8tF8rPv/Wa8iX1nVulc+71k/ma5RYijMSDbWYi4oTAYHIdKE0AwAA X-Env-Sender: stwiss.opensource@diasemi.com X-Msg-Ref: server-6.tower-179.messagelabs.com!1477930534!63574082!7 X-Originating-IP: [94.185.165.51] X-StarScan-Received: X-StarScan-Version: 9.0.13; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22614 invoked from network); 31 Oct 2016 16:15:37 -0000 Received: from mailrelay2.diasemi.com (HELO sw-ex-cashub01.diasemi.com) (94.185.165.51) by server-6.tower-179.messagelabs.com with AES128-SHA encrypted SMTP; 31 Oct 2016 16:15:37 -0000 Received: from swsrvapps-01.diasemi.com (10.20.28.141) by SW-EX-CASHUB01.diasemi.com (10.20.16.140) with Microsoft SMTP Server id 14.3.248.2; Mon, 31 Oct 2016 16:15:36 +0000 Received: by swsrvapps-01.diasemi.com (Postfix, from userid 22547) id 467003FBF4; Mon, 31 Oct 2016 16:15:33 +0000 (GMT) Message-ID: <72145ea5055e95d7b6f05168c641927e4f3830d9.1477929725.git.stwiss.opensource@diasemi.com> In-Reply-To: References: From: Steve Twiss Date: Mon, 31 Oct 2016 16:02:04 +0000 Subject: [PATCH V3 5/9] mfd: da9061: MFD core support To: LINUX-KERNEL , Lee Jones CC: DEVICETREE , Dmitry Torokhov , Eduardo Valentin , Guenter Roeck , LINUX-INPUT , LINUX-PM , LINUX-WATCHDOG , Liam Girdwood , Mark Brown , Mark Rutland , Rob Herring , Support Opensource , Wim Van Sebroeck , Zhang Rui MIME-Version: 1.0 X-KSE-AttachmentFiltering-Interceptor-Info: protection disabled X-KSE-ServerInfo: sw-ex-cashub01.diasemi.com, 9 X-KSE-Antivirus-Interceptor-Info: scan successful X-KSE-Antivirus-Info: Clean, bases: 31/10/2016 13:14:00 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Steve Twiss MFD support for DA9061 is provided as part of the DA9062 device driver. The registers header file adds two new chip variant IDs defined in DA9061 and DA9062 hardware. The core header file adds new software enumerations for listing the valid DA9061 IRQs and a da9062_compatible_types enumeration for distinguishing between DA9061/62 devices in software. The core source code adds a new .compatible of_device_id entry. This is extended from DA9062 to support both "dlg,da9061" and "dlg,da9062". The .data entry now holds a reference to the enumerated device type. A new regmap_irq_chip model is added for DA9061 and this supports the new list of regmap_irq entries. A new mfd_cell da9061_devs[] array lists the new sub system components for DA9061. Support is added for a new DA9061 regmap_config which lists the correct readable, writable and volatile ranges for this chip. The probe function uses the device tree compatible string to switch on the da9062_compatible_types and configure the correct mfd cells, irq chip and regmap config. Kconfig is updated to reflect support for DA9061 and DA9062 PMICs. Signed-off-by: Steve Twiss --- This patch applies against linux-next and v4.8 v2 -> v3 - NO CODE CHANGE - Patch renamed from [PATCH V2 05/10] to [PATCH V3 5/9] v1 -> v2 - Patch renamed from [PATCH V1 01/10] to [PATCH V2 05/10] -- these changes were made to fix checkpatch warnings caused by the patch set dependency order - Fixed typo in the commit message "readble" to "readable" - Removed the explicit cross-check to decide if there is a conflict between the device tree compatible string and the hardware definition. This patch assumes the device tree is correctly written and therefore removes the need for a hardware/DT sanity check. - Removed extra semicolon in drivers/mfd/da9062-core.c:877 - Re-write compatible entries into numerical order Lee, This patch adds support for the DA9061 PMIC. This is done as part of the existing DA9062 device driver by extending the of_device_id match table. This in turn allows new MFD cells, irq chip and regmap definitions to support DA9061. Regards, Steve Twiss, Dialog Semiconductor Ltd. drivers/mfd/Kconfig | 5 +- drivers/mfd/da9062-core.c | 427 +++++++++++++++++++++++++++++++++-- include/linux/mfd/da9062/core.h | 27 ++- include/linux/mfd/da9062/registers.h | 2 + 4 files changed, 441 insertions(+), 20 deletions(-) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 2d1fb64..533798a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -236,13 +236,14 @@ config MFD_DA9055 called "da9055" config MFD_DA9062 - tristate "Dialog Semiconductor DA9062 PMIC Support" + tristate "Dialog Semiconductor DA9062/61 PMIC Support" select MFD_CORE select REGMAP_I2C select REGMAP_IRQ depends on I2C help - Say yes here for support for the Dialog Semiconductor DA9062 PMIC. + Say yes here for support for the Dialog Semiconductor DA9061 and + DA9062 PMICs. This includes the I2C driver and core APIs. Additional drivers must be enabled in order to use the functionality of the device. diff --git a/drivers/mfd/da9062-core.c b/drivers/mfd/da9062-core.c index 8f873866..6585ad6 100644 --- a/drivers/mfd/da9062-core.c +++ b/drivers/mfd/da9062-core.c @@ -1,5 +1,5 @@ /* - * Core, IRQ and I2C device driver for DA9062 PMIC + * Core, IRQ and I2C device driver for DA9061 and DA9062 PMICs * Copyright (C) 2015 Dialog Semiconductor Ltd. * * This program is free software; you can redistribute it and/or @@ -30,6 +30,70 @@ #define DA9062_REG_EVENT_B_OFFSET 1 #define DA9062_REG_EVENT_C_OFFSET 2 +static struct regmap_irq da9061_irqs[] = { + /* EVENT A */ + [DA9061_IRQ_ONKEY] = { + .reg_offset = DA9062_REG_EVENT_A_OFFSET, + .mask = DA9062AA_M_NONKEY_MASK, + }, + [DA9061_IRQ_WDG_WARN] = { + .reg_offset = DA9062_REG_EVENT_A_OFFSET, + .mask = DA9062AA_M_WDG_WARN_MASK, + }, + [DA9061_IRQ_SEQ_RDY] = { + .reg_offset = DA9062_REG_EVENT_A_OFFSET, + .mask = DA9062AA_M_SEQ_RDY_MASK, + }, + /* EVENT B */ + [DA9061_IRQ_TEMP] = { + .reg_offset = DA9062_REG_EVENT_B_OFFSET, + .mask = DA9062AA_M_TEMP_MASK, + }, + [DA9061_IRQ_LDO_LIM] = { + .reg_offset = DA9062_REG_EVENT_B_OFFSET, + .mask = DA9062AA_M_LDO_LIM_MASK, + }, + [DA9061_IRQ_DVC_RDY] = { + .reg_offset = DA9062_REG_EVENT_B_OFFSET, + .mask = DA9062AA_M_DVC_RDY_MASK, + }, + [DA9061_IRQ_VDD_WARN] = { + .reg_offset = DA9062_REG_EVENT_B_OFFSET, + .mask = DA9062AA_M_VDD_WARN_MASK, + }, + /* EVENT C */ + [DA9061_IRQ_GPI0] = { + .reg_offset = DA9062_REG_EVENT_C_OFFSET, + .mask = DA9062AA_M_GPI0_MASK, + }, + [DA9061_IRQ_GPI1] = { + .reg_offset = DA9062_REG_EVENT_C_OFFSET, + .mask = DA9062AA_M_GPI1_MASK, + }, + [DA9061_IRQ_GPI2] = { + .reg_offset = DA9062_REG_EVENT_C_OFFSET, + .mask = DA9062AA_M_GPI2_MASK, + }, + [DA9061_IRQ_GPI3] = { + .reg_offset = DA9062_REG_EVENT_C_OFFSET, + .mask = DA9062AA_M_GPI3_MASK, + }, + [DA9061_IRQ_GPI4] = { + .reg_offset = DA9062_REG_EVENT_C_OFFSET, + .mask = DA9062AA_M_GPI4_MASK, + }, +}; + +static struct regmap_irq_chip da9061_irq_chip = { + .name = "da9061-irq", + .irqs = da9061_irqs, + .num_irqs = DA9061_NUM_IRQ, + .num_regs = 3, + .status_base = DA9062AA_EVENT_A, + .mask_base = DA9062AA_IRQ_MASK_A, + .ack_base = DA9062AA_EVENT_A, +}; + static struct regmap_irq da9062_irqs[] = { /* EVENT A */ [DA9062_IRQ_ONKEY] = { @@ -102,6 +166,57 @@ static struct regmap_irq_chip da9062_irq_chip = { .ack_base = DA9062AA_EVENT_A, }; +static struct resource da9061_core_resources[] = { + DEFINE_RES_NAMED(DA9061_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ), +}; + +static struct resource da9061_regulators_resources[] = { + DEFINE_RES_NAMED(DA9061_IRQ_LDO_LIM, 1, "LDO_LIM", IORESOURCE_IRQ), +}; + +static struct resource da9061_thermal_resources[] = { + DEFINE_RES_NAMED(DA9061_IRQ_TEMP, 1, "THERMAL", IORESOURCE_IRQ), +}; + +static struct resource da9061_wdt_resources[] = { + DEFINE_RES_NAMED(DA9061_IRQ_WDG_WARN, 1, "WD_WARN", IORESOURCE_IRQ), +}; + +static struct resource da9061_onkey_resources[] = { + DEFINE_RES_NAMED(DA9061_IRQ_ONKEY, 1, "ONKEY", IORESOURCE_IRQ), +}; + +static const struct mfd_cell da9061_devs[] = { + { + .name = "da9061-core", + .num_resources = ARRAY_SIZE(da9061_core_resources), + .resources = da9061_core_resources, + }, + { + .name = "da9062-regulators", + .num_resources = ARRAY_SIZE(da9061_regulators_resources), + .resources = da9061_regulators_resources, + }, + { + .name = "da9061-watchdog", + .num_resources = ARRAY_SIZE(da9061_wdt_resources), + .resources = da9061_wdt_resources, + .of_compatible = "dlg,da9061-watchdog", + }, + { + .name = "da9061-thermal", + .num_resources = ARRAY_SIZE(da9061_thermal_resources), + .resources = da9061_thermal_resources, + .of_compatible = "dlg,da9061-thermal", + }, + { + .name = "da9061-onkey", + .num_resources = ARRAY_SIZE(da9061_onkey_resources), + .resources = da9061_onkey_resources, + .of_compatible = "dlg,da9061-onkey", + }, +}; + static struct resource da9062_core_resources[] = { DEFINE_RES_NAMED(DA9062_IRQ_VDD_WARN, 1, "VDD_WARN", IORESOURCE_IRQ), }; @@ -142,7 +257,7 @@ static const struct mfd_cell da9062_devs[] = { .name = "da9062-watchdog", .num_resources = ARRAY_SIZE(da9062_wdt_resources), .resources = da9062_wdt_resources, - .of_compatible = "dlg,da9062-wdt", + .of_compatible = "dlg,da9062-watchdog", }, { .name = "da9062-thermal", @@ -200,7 +315,8 @@ static int da9062_clear_fault_log(struct da9062 *chip) static int da9062_get_device_type(struct da9062 *chip) { - int device_id, variant_id, variant_mrc; + int device_id, variant_id, variant_mrc, variant_vrc; + char *type; int ret; ret = regmap_read(chip->regmap, DA9062AA_DEVICE_ID, &device_id); @@ -208,6 +324,7 @@ static int da9062_get_device_type(struct da9062 *chip) dev_err(chip->dev, "Cannot read chip ID.\n"); return -EIO; } + if (device_id != DA9062_PMIC_DEVICE_ID) { dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id); return -ENODEV; @@ -219,9 +336,23 @@ static int da9062_get_device_type(struct da9062 *chip) return -EIO; } + variant_vrc = (variant_id & DA9062AA_VRC_MASK) >> DA9062AA_VRC_SHIFT; + + switch (variant_vrc) { + case DA9062_PMIC_VARIANT_VRC_DA9061: + type = "DA9061"; + break; + case DA9062_PMIC_VARIANT_VRC_DA9062: + type = "DA9062"; + break; + default: + type = "Unknown"; + break; + } + dev_info(chip->dev, - "Device detected (device-ID: 0x%02X, var-ID: 0x%02X)\n", - device_id, variant_id); + "Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n", + device_id, variant_id, type); variant_mrc = (variant_id & DA9062AA_MRC_MASK) >> DA9062AA_MRC_SHIFT; @@ -234,6 +365,234 @@ static int da9062_get_device_type(struct da9062 *chip) return ret; } +static const struct regmap_range da9061_aa_readable_ranges[] = { + { + .range_min = DA9062AA_PAGE_CON, + .range_max = DA9062AA_STATUS_B, + }, { + .range_min = DA9062AA_STATUS_D, + .range_max = DA9062AA_EVENT_C, + }, { + .range_min = DA9062AA_IRQ_MASK_A, + .range_max = DA9062AA_IRQ_MASK_C, + }, { + .range_min = DA9062AA_CONTROL_A, + .range_max = DA9062AA_GPIO_4, + }, { + .range_min = DA9062AA_GPIO_WKUP_MODE, + .range_max = DA9062AA_GPIO_OUT3_4, + }, { + .range_min = DA9062AA_BUCK1_CONT, + .range_max = DA9062AA_BUCK4_CONT, + }, { + .range_min = DA9062AA_BUCK3_CONT, + .range_max = DA9062AA_BUCK3_CONT, + }, { + .range_min = DA9062AA_LDO1_CONT, + .range_max = DA9062AA_LDO4_CONT, + }, { + .range_min = DA9062AA_DVC_1, + .range_max = DA9062AA_DVC_1, + }, { + .range_min = DA9062AA_SEQ, + .range_max = DA9062AA_ID_4_3, + }, { + .range_min = DA9062AA_ID_12_11, + .range_max = DA9062AA_ID_16_15, + }, { + .range_min = DA9062AA_ID_22_21, + .range_max = DA9062AA_ID_32_31, + }, { + .range_min = DA9062AA_SEQ_A, + .range_max = DA9062AA_WAIT, + }, { + .range_min = DA9062AA_RESET, + .range_max = DA9062AA_BUCK_ILIM_C, + }, { + .range_min = DA9062AA_BUCK1_CFG, + .range_max = DA9062AA_BUCK3_CFG, + }, { + .range_min = DA9062AA_VBUCK1_A, + .range_max = DA9062AA_VBUCK4_A, + }, { + .range_min = DA9062AA_VBUCK3_A, + .range_max = DA9062AA_VBUCK3_A, + }, { + .range_min = DA9062AA_VLDO1_A, + .range_max = DA9062AA_VLDO4_A, + }, { + .range_min = DA9062AA_VBUCK1_B, + .range_max = DA9062AA_VBUCK4_B, + }, { + .range_min = DA9062AA_VBUCK3_B, + .range_max = DA9062AA_VBUCK3_B, + }, { + .range_min = DA9062AA_VLDO1_B, + .range_max = DA9062AA_VLDO4_B, + }, { + .range_min = DA9062AA_BBAT_CONT, + .range_max = DA9062AA_BBAT_CONT, + }, { + .range_min = DA9062AA_INTERFACE, + .range_max = DA9062AA_CONFIG_E, + }, { + .range_min = DA9062AA_CONFIG_G, + .range_max = DA9062AA_CONFIG_K, + }, { + .range_min = DA9062AA_CONFIG_M, + .range_max = DA9062AA_CONFIG_M, + }, { + .range_min = DA9062AA_GP_ID_0, + .range_max = DA9062AA_GP_ID_19, + }, { + .range_min = DA9062AA_DEVICE_ID, + .range_max = DA9062AA_CONFIG_ID, + }, +}; + +static const struct regmap_range da9061_aa_writeable_ranges[] = { + { + .range_min = DA9062AA_PAGE_CON, + .range_max = DA9062AA_PAGE_CON, + }, { + .range_min = DA9062AA_FAULT_LOG, + .range_max = DA9062AA_EVENT_C, + }, { + .range_min = DA9062AA_IRQ_MASK_A, + .range_max = DA9062AA_IRQ_MASK_C, + }, { + .range_min = DA9062AA_CONTROL_A, + .range_max = DA9062AA_GPIO_4, + }, { + .range_min = DA9062AA_GPIO_WKUP_MODE, + .range_max = DA9062AA_GPIO_OUT3_4, + }, { + .range_min = DA9062AA_BUCK1_CONT, + .range_max = DA9062AA_BUCK4_CONT, + }, { + .range_min = DA9062AA_BUCK3_CONT, + .range_max = DA9062AA_BUCK3_CONT, + }, { + .range_min = DA9062AA_LDO1_CONT, + .range_max = DA9062AA_LDO4_CONT, + }, { + .range_min = DA9062AA_DVC_1, + .range_max = DA9062AA_DVC_1, + }, { + .range_min = DA9062AA_SEQ, + .range_max = DA9062AA_ID_4_3, + }, { + .range_min = DA9062AA_ID_12_11, + .range_max = DA9062AA_ID_16_15, + }, { + .range_min = DA9062AA_ID_22_21, + .range_max = DA9062AA_ID_32_31, + }, { + .range_min = DA9062AA_SEQ_A, + .range_max = DA9062AA_WAIT, + }, { + .range_min = DA9062AA_RESET, + .range_max = DA9062AA_BUCK_ILIM_C, + }, { + .range_min = DA9062AA_BUCK1_CFG, + .range_max = DA9062AA_BUCK3_CFG, + }, { + .range_min = DA9062AA_VBUCK1_A, + .range_max = DA9062AA_VBUCK4_A, + }, { + .range_min = DA9062AA_VBUCK3_A, + .range_max = DA9062AA_VBUCK3_A, + }, { + .range_min = DA9062AA_VLDO1_A, + .range_max = DA9062AA_VLDO4_A, + }, { + .range_min = DA9062AA_VBUCK1_B, + .range_max = DA9062AA_VBUCK4_B, + }, { + .range_min = DA9062AA_VBUCK3_B, + .range_max = DA9062AA_VBUCK3_B, + }, { + .range_min = DA9062AA_VLDO1_B, + .range_max = DA9062AA_VLDO4_B, + }, { + .range_min = DA9062AA_BBAT_CONT, + .range_max = DA9062AA_BBAT_CONT, + }, { + .range_min = DA9062AA_GP_ID_0, + .range_max = DA9062AA_GP_ID_19, + }, +}; + +static const struct regmap_range da9061_aa_volatile_ranges[] = { + { + .range_min = DA9062AA_PAGE_CON, + .range_max = DA9062AA_STATUS_B, + }, { + .range_min = DA9062AA_STATUS_D, + .range_max = DA9062AA_EVENT_C, + }, { + .range_min = DA9062AA_CONTROL_A, + .range_max = DA9062AA_CONTROL_B, + }, { + .range_min = DA9062AA_CONTROL_E, + .range_max = DA9062AA_CONTROL_F, + }, { + .range_min = DA9062AA_BUCK1_CONT, + .range_max = DA9062AA_BUCK4_CONT, + }, { + .range_min = DA9062AA_BUCK3_CONT, + .range_max = DA9062AA_BUCK3_CONT, + }, { + .range_min = DA9062AA_LDO1_CONT, + .range_max = DA9062AA_LDO4_CONT, + }, { + .range_min = DA9062AA_DVC_1, + .range_max = DA9062AA_DVC_1, + }, { + .range_min = DA9062AA_SEQ, + .range_max = DA9062AA_SEQ, + }, +}; + +static const struct regmap_access_table da9061_aa_readable_table = { + .yes_ranges = da9061_aa_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9061_aa_readable_ranges), +}; + +static const struct regmap_access_table da9061_aa_writeable_table = { + .yes_ranges = da9061_aa_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9061_aa_writeable_ranges), +}; + +static const struct regmap_access_table da9061_aa_volatile_table = { + .yes_ranges = da9061_aa_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(da9061_aa_volatile_ranges), +}; + +static const struct regmap_range_cfg da9061_range_cfg[] = { + { + .range_min = DA9062AA_PAGE_CON, + .range_max = DA9062AA_CONFIG_ID, + .selector_reg = DA9062AA_PAGE_CON, + .selector_mask = 1 << DA9062_I2C_PAGE_SEL_SHIFT, + .selector_shift = DA9062_I2C_PAGE_SEL_SHIFT, + .window_start = 0, + .window_len = 256, + } +}; + +static struct regmap_config da9061_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .ranges = da9061_range_cfg, + .num_ranges = ARRAY_SIZE(da9061_range_cfg), + .max_register = DA9062AA_CONFIG_ID, + .cache_type = REGCACHE_RBTREE, + .rd_table = &da9061_aa_readable_table, + .wr_table = &da9061_aa_writeable_table, + .volatile_table = &da9061_aa_volatile_table, +}; + static const struct regmap_range da9062_aa_readable_ranges[] = { { .range_min = DA9062AA_PAGE_CON, @@ -456,17 +815,38 @@ static struct regmap_config da9062_regmap_config = { .volatile_table = &da9062_aa_volatile_table, }; +static const struct of_device_id da9062_dt_ids[] = { + { .compatible = "dlg,da9061", .data = (void *)COMPAT_TYPE_DA9061, }, + { .compatible = "dlg,da9062", .data = (void *)COMPAT_TYPE_DA9062, }, + { } +}; +MODULE_DEVICE_TABLE(of, da9062_dt_ids); + static int da9062_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct da9062 *chip; + const struct of_device_id *match; unsigned int irq_base; + const struct mfd_cell *cell; + const struct regmap_irq_chip *irq_chip; + const struct regmap_config *config; + int cell_num; int ret; chip = devm_kzalloc(&i2c->dev, sizeof(*chip), GFP_KERNEL); if (!chip) return -ENOMEM; + if (i2c->dev.of_node) { + match = of_match_node(da9062_dt_ids, i2c->dev.of_node); + if (!match) + return -EINVAL; + + chip->chip_type = (int)match->data; + } else + chip->chip_type = id->driver_data; + i2c_set_clientdata(i2c, chip); chip->dev = &i2c->dev; @@ -475,7 +855,25 @@ static int da9062_i2c_probe(struct i2c_client *i2c, return -EINVAL; } - chip->regmap = devm_regmap_init_i2c(i2c, &da9062_regmap_config); + switch (chip->chip_type) { + case(COMPAT_TYPE_DA9061): + cell = da9061_devs; + cell_num = ARRAY_SIZE(da9061_devs); + irq_chip = &da9061_irq_chip; + config = &da9061_regmap_config; + break; + case(COMPAT_TYPE_DA9062): + cell = da9062_devs; + cell_num = ARRAY_SIZE(da9062_devs); + irq_chip = &da9062_irq_chip; + config = &da9062_regmap_config; + break; + default: + dev_err(chip->dev, "Unrecognised chip type\n"); + return -ENODEV; + } + + chip->regmap = devm_regmap_init_i2c(i2c, config); if (IS_ERR(chip->regmap)) { ret = PTR_ERR(chip->regmap); dev_err(chip->dev, "Failed to allocate register map: %d\n", @@ -493,7 +891,7 @@ static int da9062_i2c_probe(struct i2c_client *i2c, ret = regmap_add_irq_chip(chip->regmap, i2c->irq, IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, - -1, &da9062_irq_chip, + -1, irq_chip, &chip->regmap_irq); if (ret) { dev_err(chip->dev, "Failed to request IRQ %d: %d\n", @@ -503,8 +901,8 @@ static int da9062_i2c_probe(struct i2c_client *i2c, irq_base = regmap_irq_chip_get_base(chip->regmap_irq); - ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, da9062_devs, - ARRAY_SIZE(da9062_devs), NULL, irq_base, + ret = mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, cell, + cell_num, NULL, irq_base, NULL); if (ret) { dev_err(chip->dev, "Cannot register child devices\n"); @@ -526,17 +924,12 @@ static int da9062_i2c_remove(struct i2c_client *i2c) } static const struct i2c_device_id da9062_i2c_id[] = { - { "da9062", 0 }, + { "da9061", COMPAT_TYPE_DA9061 }, + { "da9062", COMPAT_TYPE_DA9062 }, { }, }; MODULE_DEVICE_TABLE(i2c, da9062_i2c_id); -static const struct of_device_id da9062_dt_ids[] = { - { .compatible = "dlg,da9062", }, - { } -}; -MODULE_DEVICE_TABLE(of, da9062_dt_ids); - static struct i2c_driver da9062_i2c_driver = { .driver = { .name = "da9062", @@ -549,6 +942,6 @@ static struct i2c_driver da9062_i2c_driver = { module_i2c_driver(da9062_i2c_driver); -MODULE_DESCRIPTION("Core device driver for Dialog DA9062"); +MODULE_DESCRIPTION("Core device driver for Dialog DA9061 and DA9062"); MODULE_AUTHOR("Steve Twiss "); MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/da9062/core.h b/include/linux/mfd/da9062/core.h index 376ba84..199c524 100644 --- a/include/linux/mfd/da9062/core.h +++ b/include/linux/mfd/da9062/core.h @@ -18,7 +18,31 @@ #include #include -/* Interrupts */ +enum da9062_compatible_types { + COMPAT_TYPE_DA9061 = 1, + COMPAT_TYPE_DA9062, +}; + +enum da9061_irqs { + /* IRQ A */ + DA9061_IRQ_ONKEY, + DA9061_IRQ_WDG_WARN, + DA9061_IRQ_SEQ_RDY, + /* IRQ B*/ + DA9061_IRQ_TEMP, + DA9061_IRQ_LDO_LIM, + DA9061_IRQ_DVC_RDY, + DA9061_IRQ_VDD_WARN, + /* IRQ C */ + DA9061_IRQ_GPI0, + DA9061_IRQ_GPI1, + DA9061_IRQ_GPI2, + DA9061_IRQ_GPI3, + DA9061_IRQ_GPI4, + + DA9061_NUM_IRQ, +}; + enum da9062_irqs { /* IRQ A */ DA9062_IRQ_ONKEY, @@ -45,6 +69,7 @@ struct da9062 { struct device *dev; struct regmap *regmap; struct regmap_irq_chip_data *regmap_irq; + enum da9062_compatible_types chip_type; }; #endif /* __MFD_DA9062_CORE_H__ */ diff --git a/include/linux/mfd/da9062/registers.h b/include/linux/mfd/da9062/registers.h index 97790d1..4457fdc 100644 --- a/include/linux/mfd/da9062/registers.h +++ b/include/linux/mfd/da9062/registers.h @@ -18,6 +18,8 @@ #define DA9062_PMIC_DEVICE_ID 0x62 #define DA9062_PMIC_VARIANT_MRC_AA 0x01 +#define DA9062_PMIC_VARIANT_VRC_DA9061 0x01 +#define DA9062_PMIC_VARIANT_VRC_DA9062 0x02 #define DA9062_I2C_PAGE_SEL_SHIFT 1