From patchwork Mon Dec 18 12:29:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 10119423 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E33DC60327 for ; Mon, 18 Dec 2017 12:39:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D2D6028FD4 for ; Mon, 18 Dec 2017 12:39:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C4EBB28FD6; Mon, 18 Dec 2017 12:39:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78F0428FD4 for ; Mon, 18 Dec 2017 12:39:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759162AbdLRM3H (ORCPT ); Mon, 18 Dec 2017 07:29:07 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:37205 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759155AbdLRM3E (ORCPT ); Mon, 18 Dec 2017 07:29:04 -0500 Received: by mail-wm0-f67.google.com with SMTP id f140so28992512wmd.2 for ; Mon, 18 Dec 2017 04:29:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:cc:references:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=WtRJSCpFFzp90eyL/7bncvkmJHFRABS1DtrFK2ynQw8=; b=car5VqSxI2zvwaSIivncIjGV/6OPRi7hiGsIuPkoiHiYCTPDj47iv0m1PNiiAxgHW9 G1AhuZtJOVrl56f/moMdiLVAuYzYDZC+jW8Erv2jYiBz3BPiJo9BypcSb+EG88W1P08l QeTPQc+yu9kLeVaLyUnc/X6eKNQoYmHIEhqbOvK32jnFjikjRKFhM2e8JmLX3nSZ0BhB 1oYpGw673ve42j2hS+5n6lUUI561Bdap7kM8evNj4yNjSVM3V1jA+STYuGtNLiudtca8 9j7hXWcHabZqkjZuvz+jE6WJEm1RbaY964t3DkBzUtyVKuSlh/ZXQxFkaTrNUG9AiiPS 7GVA== X-Gm-Message-State: AKGB3mKGUVBgLbuVna0ZfFw/TZkOBOubVpFSG2jd/b/ftVb78xbD361m rq8agpnBZxNEKtvNLe3O/tMJog== X-Google-Smtp-Source: ACJfBovf2A2WUOn2QaPcGRyc8ntJ9Dvi/AgsqDDWXAMD8y/7gF8wmnDFgcRtDYnjbK27P84I/iCP1Q== X-Received: by 10.80.149.94 with SMTP id v30mr29450100eda.284.1513600143482; Mon, 18 Dec 2017 04:29:03 -0800 (PST) Received: from [192.168.1.13] ([90.77.100.34]) by smtp.gmail.com with ESMTPSA id d3sm10686501edc.15.2017.12.18.04.29.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Dec 2017 04:29:03 -0800 (PST) Subject: Re: [BISECTED] tpm CLKRUN breaks PS/2 keyboard and touchpad on Braswell system From: Javier Martinez Canillas To: Jarkko Sakkinen , Jason Gunthorpe Cc: James Ettle , linux-integrity@vger.kernel.org, azhar.shaikh@intel.com, linux-kernel@vger.kernel.org, james.l.morris@oracle.com References: <57d96314-cc9c-0656-186e-4eb77a132b70@ettle.org.uk> <34b361bf-cce7-a1ac-f8a3-76ef22f5b6b0@redhat.com> <5fb5de24-5a4c-4c01-1f72-49fc5844516c@ettle.org.uk> <011b4d29-9d93-4b7a-90dd-0c25cf184c3e@redhat.com> <20171214191052.GA20833@ziepe.ca> <20171215145630.ftsnj4azqqhzqwsh@linux.intel.com> <20171215173826.GD12434@ziepe.ca> <1513443676.29063.0.camel@linux.intel.com> Message-ID: <16609e73-e35d-4bb0-410d-e87915daba39@redhat.com> Date: Mon, 18 Dec 2017 13:29:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US Sender: linux-integrity-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-integrity@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On 12/18/2017 01:22 PM, Javier Martinez Canillas wrote: [snip] > > James, > > Can you please test the following (untested) patch on top of the other two > mentioned patches to see if it makes a difference for you? > I should had tried to at least compile the patch :) Updated patch below: From 370d45a34dc8914066a995a3a6d6df1953ea9f60 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Mon, 18 Dec 2017 12:56:28 +0100 Subject: [PATCH v2] tpm: only attempt to disable the LPC CLKRUN if is already enabled Commit 5e572cab92f0 ("tpm: Enable CLKRUN protocol for Braswell systems") added logic in the TPM TIS driver to disable the Low Pin Count CLKRUN signal during TPM transactions. Unfortunately this breaks other devices that are attached to the LPC bus like for example PS/2 mouse and keyboards. One flaw with the logic is that it assumes that the CLKRUN is always enabled, and so it unconditionally enables it after a TPM transaction. But it could be that the CLKRUN signal was already disabled in the LPC bus and so after the driver probes, the signal will remain enabled which may break other devices transactions since the clocks will be restarted by the CLKRUN# signal. Fixes: 5e572cab92f0 ("tpm: Enable CLKRUN protocol for Braswell systems") Signed-off-by: Javier Martinez Canillas --- drivers/char/tpm/tpm_tis_core.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c index e7bd2e750f69..5f2b1fc2194f 100644 --- a/drivers/char/tpm/tpm_tis_core.c +++ b/drivers/char/tpm/tpm_tis_core.c @@ -688,7 +688,8 @@ static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); u32 clkrun_val; - if (!IS_ENABLED(CONFIG_X86) || !is_bsw()) + if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || + !data->ilb_base_addr) return; if (value) { @@ -746,7 +747,7 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, const struct tpm_tis_phy_ops *phy_ops, acpi_handle acpi_dev_handle) { - u32 vendor, intfcaps, intmask; + u32 vendor, intfcaps, intmask, clkrun_val; u8 rid; int rc, probe; struct tpm_chip *chip; @@ -772,6 +773,14 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, ILB_REMAP_SIZE); if (!priv->ilb_base_addr) return -ENOMEM; + + clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); + /* Check if CLKRUN# is already not enabled in the LPC bus */ + if (!(clkrun_val & LPC_CLKRUN_EN)) { + priv->flags |= TPM_TIS_CLK_ENABLE; + iounmap(priv->ilb_base_addr); + priv->ilb_base_addr = NULL; + } } if (chip->ops->clk_enable != NULL) @@ -868,7 +877,7 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, } rc = tpm_chip_register(chip); - if (rc && is_bsw()) + if (rc && is_bsw() && priv->ilb_base_addr) iounmap(priv->ilb_base_addr); if (chip->ops->clk_enable != NULL)