diff mbox series

[v2,1/2] riscv: consolidate __ex_table construction

Message ID 20211020220610.25443e4c@xhacker (mailing list archive)
State New, archived
Headers show
Series riscv: switch to relative extable | expand

Commit Message

Jisheng Zhang Oct. 20, 2021, 2:06 p.m. UTC 
From: Jisheng Zhang <jszhang@kernel.org>

Consolidate all the __ex_table constuction code with a _ASM_EXTABLE
helper.

There should be no functional change as a result of this patch.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/include/asm/futex.h   | 12 +++-------
 arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
 2 files changed, 17 insertions(+), 35 deletions(-)

Comments

Kefeng Wang Oct. 21, 2021, 11:38 a.m. UTC | #1 
On 2021/10/20 22:06, Jisheng Zhang wrote:
> From: Jisheng Zhang <jszhang@kernel.org>
> 
> Consolidate all the __ex_table constuction code with a _ASM_EXTABLE
> helper.
> 
> There should be no functional change as a result of this patch.
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>   arch/riscv/include/asm/futex.h   | 12 +++-------
>   arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
>   2 files changed, 17 insertions(+), 35 deletions(-)
> 
> diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
> index 1b00badb9f87..3191574e135c 100644
> --- a/arch/riscv/include/asm/futex.h
> +++ b/arch/riscv/include/asm/futex.h
> @@ -30,10 +30,7 @@
>   	"3:	li %[r],%[e]				\n"	\
>   	"	jump 2b,%[t]				\n"	\
>   	"	.previous				\n"	\
> -	"	.section __ex_table,\"a\"		\n"	\
> -	"	.balign " RISCV_SZPTR "			\n"	\
> -	"	" RISCV_PTR " 1b, 3b			\n"	\
> -	"	.previous				\n"	\
> +		_ASM_EXTABLE(1b, 3b)				\
>   	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
>   	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\
>   	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\
> @@ -103,11 +100,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
>   	"4:	li %[r],%[e]				\n"
>   	"	jump 3b,%[t]				\n"
>   	"	.previous				\n"
> -	"	.section __ex_table,\"a\"		\n"
> -	"	.balign " RISCV_SZPTR "			\n"
> -	"	" RISCV_PTR " 1b, 4b			\n"
> -	"	" RISCV_PTR " 2b, 4b			\n"
> -	"	.previous				\n"
> +		_ASM_EXTABLE(1b, 4b)			\
> +		_ASM_EXTABLE(2b, 4b)			\
>   	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
>   	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
>   	: "memory");
> diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
> index f314ff44c48d..35802e72ace8 100644
> --- a/arch/riscv/include/asm/uaccess.h
> +++ b/arch/riscv/include/asm/uaccess.h
> @@ -10,6 +10,12 @@
>   
>   #include <asm/pgtable.h>		/* for TASK_SIZE */
>   
> +#define _ASM_EXTABLE(from, to)						\
> +	"	.pushsection	__ex_table, \"a\"\n"			\
> +	"	.balign "	RISCV_SZPTR "	 \n"			\
> +	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
> +	"	.popsection\n"
> +

The jump_label mechanism could use this macro too,
see arch/riscv/include/asm/jump_label.h, maybe move the above into asm.h
and also do some replace in next patch ?

Question: the jump label use relative address, but why not trigger the 
Section mismatch issue?
Jisheng Zhang Oct. 21, 2021, 3:43 p.m. UTC | #2 
On Thu, 21 Oct 2021 19:38:41 +0800
Kefeng Wang <wangkefeng.wang@huawei.com> wrote:

> On 2021/10/20 22:06, Jisheng Zhang wrote:
> > From: Jisheng Zhang <jszhang@kernel.org>
> > 
> > Consolidate all the __ex_table constuction code with a _ASM_EXTABLE
> > helper.
> > 
> > There should be no functional change as a result of this patch.
> > 
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > ---
> >   arch/riscv/include/asm/futex.h   | 12 +++-------
> >   arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
> >   2 files changed, 17 insertions(+), 35 deletions(-)
> > 
> > diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
> > index 1b00badb9f87..3191574e135c 100644
> > --- a/arch/riscv/include/asm/futex.h
> > +++ b/arch/riscv/include/asm/futex.h
> > @@ -30,10 +30,7 @@
> >   	"3:	li %[r],%[e]				\n"	\
> >   	"	jump 2b,%[t]				\n"	\
> >   	"	.previous				\n"	\
> > -	"	.section __ex_table,\"a\"		\n"	\
> > -	"	.balign " RISCV_SZPTR "			\n"	\
> > -	"	" RISCV_PTR " 1b, 3b			\n"	\
> > -	"	.previous				\n"	\
> > +		_ASM_EXTABLE(1b, 3b)				\
> >   	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
> >   	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\
> >   	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\
> > @@ -103,11 +100,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
> >   	"4:	li %[r],%[e]				\n"
> >   	"	jump 3b,%[t]				\n"
> >   	"	.previous				\n"
> > -	"	.section __ex_table,\"a\"		\n"
> > -	"	.balign " RISCV_SZPTR "			\n"
> > -	"	" RISCV_PTR " 1b, 4b			\n"
> > -	"	" RISCV_PTR " 2b, 4b			\n"
> > -	"	.previous				\n"
> > +		_ASM_EXTABLE(1b, 4b)			\
> > +		_ASM_EXTABLE(2b, 4b)			\
> >   	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
> >   	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
> >   	: "memory");
> > diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
> > index f314ff44c48d..35802e72ace8 100644
> > --- a/arch/riscv/include/asm/uaccess.h
> > +++ b/arch/riscv/include/asm/uaccess.h
> > @@ -10,6 +10,12 @@
> >   
> >   #include <asm/pgtable.h>		/* for TASK_SIZE */
> >   
> > +#define _ASM_EXTABLE(from, to)						\
> > +	"	.pushsection	__ex_table, \"a\"\n"			\
> > +	"	.balign "	RISCV_SZPTR "	 \n"			\
> > +	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
> > +	"	.popsection\n"
> > +  
> 
> The jump_label mechanism could use this macro too,
> see arch/riscv/include/asm/jump_label.h, maybe move the above into asm.h
> and also do some replace in next patch ?

jump_label entry is a bit different with ex_table: two relative offsets and
a key which should be "long" type.

> 
> Question: the jump label use relative address, but why not trigger the 
> Section mismatch issue?

FWICT, modpost doesn't check __jump_table section
Kefeng Wang Oct. 22, 2021, 12:43 a.m. UTC | #3 
On 2021/10/21 23:43, Jisheng Zhang wrote:
> On Thu, 21 Oct 2021 19:38:41 +0800
> Kefeng Wang <wangkefeng.wang@huawei.com> wrote:
> 
>> On 2021/10/20 22:06, Jisheng Zhang wrote:
>>> From: Jisheng Zhang <jszhang@kernel.org>
>>>
>>> Consolidate all the __ex_table constuction code with a _ASM_EXTABLE
>>> helper.
>>>
>>> There should be no functional change as a result of this patch.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
>>> ---
>>>    arch/riscv/include/asm/futex.h   | 12 +++-------
>>>    arch/riscv/include/asm/uaccess.h | 40 +++++++++++---------------------
>>>    2 files changed, 17 insertions(+), 35 deletions(-)
>>>
>>> diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
>>> index 1b00badb9f87..3191574e135c 100644
>>> --- a/arch/riscv/include/asm/futex.h
>>> +++ b/arch/riscv/include/asm/futex.h
>>> @@ -30,10 +30,7 @@
>>>    	"3:	li %[r],%[e]				\n"	\
>>>    	"	jump 2b,%[t]				\n"	\
>>>    	"	.previous				\n"	\
>>> -	"	.section __ex_table,\"a\"		\n"	\
>>> -	"	.balign " RISCV_SZPTR "			\n"	\
>>> -	"	" RISCV_PTR " 1b, 3b			\n"	\
>>> -	"	.previous				\n"	\
>>> +		_ASM_EXTABLE(1b, 3b)				\
>>>    	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
>>>    	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\
>>>    	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\
>>> @@ -103,11 +100,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
>>>    	"4:	li %[r],%[e]				\n"
>>>    	"	jump 3b,%[t]				\n"
>>>    	"	.previous				\n"
>>> -	"	.section __ex_table,\"a\"		\n"
>>> -	"	.balign " RISCV_SZPTR "			\n"
>>> -	"	" RISCV_PTR " 1b, 4b			\n"
>>> -	"	" RISCV_PTR " 2b, 4b			\n"
>>> -	"	.previous				\n"
>>> +		_ASM_EXTABLE(1b, 4b)			\
>>> +		_ASM_EXTABLE(2b, 4b)			\
>>>    	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
>>>    	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
>>>    	: "memory");
>>> diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
>>> index f314ff44c48d..35802e72ace8 100644
>>> --- a/arch/riscv/include/asm/uaccess.h
>>> +++ b/arch/riscv/include/asm/uaccess.h
>>> @@ -10,6 +10,12 @@
>>>    
>>>    #include <asm/pgtable.h>		/* for TASK_SIZE */
>>>    
>>> +#define _ASM_EXTABLE(from, to)						\
>>> +	"	.pushsection	__ex_table, \"a\"\n"			\
>>> +	"	.balign "	RISCV_SZPTR "	 \n"			\
>>> +	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
>>> +	"	.popsection\n"
>>> +
>>
>> The jump_label mechanism could use this macro too,
>> see arch/riscv/include/asm/jump_label.h, maybe move the above into asm.h
>> and also do some replace in next patch ?
> 
> jump_label entry is a bit different with ex_table: two relative offsets and
> a key which should be "long" type.
> 
>>
>> Question: the jump label use relative address, but why not trigger the
>> Section mismatch issue?
> 
> FWICT, modpost doesn't check __jump_table section

OK, missing that.
> 
> 
> .
>
diff mbox series

Patch

diff --git a/arch/riscv/include/asm/futex.h b/arch/riscv/include/asm/futex.h
index 1b00badb9f87..3191574e135c 100644
--- a/arch/riscv/include/asm/futex.h
+++ b/arch/riscv/include/asm/futex.h
@@ -30,10 +30,7 @@ 
 	"3:	li %[r],%[e]				\n"	\
 	"	jump 2b,%[t]				\n"	\
 	"	.previous				\n"	\
-	"	.section __ex_table,\"a\"		\n"	\
-	"	.balign " RISCV_SZPTR "			\n"	\
-	"	" RISCV_PTR " 1b, 3b			\n"	\
-	"	.previous				\n"	\
+		_ASM_EXTABLE(1b, 3b)				\
 	: [r] "+r" (ret), [ov] "=&r" (oldval),			\
 	  [u] "+m" (*uaddr), [t] "=&r" (tmp)			\
 	: [op] "Jr" (oparg), [e] "i" (-EFAULT)			\
@@ -103,11 +100,8 @@  futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 	"4:	li %[r],%[e]				\n"
 	"	jump 3b,%[t]				\n"
 	"	.previous				\n"
-	"	.section __ex_table,\"a\"		\n"
-	"	.balign " RISCV_SZPTR "			\n"
-	"	" RISCV_PTR " 1b, 4b			\n"
-	"	" RISCV_PTR " 2b, 4b			\n"
-	"	.previous				\n"
+		_ASM_EXTABLE(1b, 4b)			\
+		_ASM_EXTABLE(2b, 4b)			\
 	: [r] "+r" (ret), [v] "=&r" (val), [u] "+m" (*uaddr), [t] "=&r" (tmp)
 	: [ov] "Jr" (oldval), [nv] "Jr" (newval), [e] "i" (-EFAULT)
 	: "memory");
diff --git a/arch/riscv/include/asm/uaccess.h b/arch/riscv/include/asm/uaccess.h
index f314ff44c48d..35802e72ace8 100644
--- a/arch/riscv/include/asm/uaccess.h
+++ b/arch/riscv/include/asm/uaccess.h
@@ -10,6 +10,12 @@ 
 
 #include <asm/pgtable.h>		/* for TASK_SIZE */
 
+#define _ASM_EXTABLE(from, to)						\
+	"	.pushsection	__ex_table, \"a\"\n"			\
+	"	.balign "	RISCV_SZPTR "	 \n"			\
+	"	" RISCV_PTR	"(" #from "), (" #to ")\n"		\
+	"	.popsection\n"
+
 /*
  * User space memory access functions
  */
@@ -93,10 +99,7 @@  do {								\
 		"	li %1, 0\n"				\
 		"	jump 2b, %2\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 3b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 3b)			\
 		: "+r" (err), "=&r" (__x), "=r" (__tmp)		\
 		: "m" (*(ptr)), "i" (-EFAULT));			\
 	(x) = __x;						\
@@ -125,11 +128,8 @@  do {								\
 		"	li %2, 0\n"				\
 		"	jump 3b, %3\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 4b\n"			\
-		"	" RISCV_PTR " 2b, 4b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 4b)			\
+			_ASM_EXTABLE(2b, 4b)			\
 		: "+r" (err), "=&r" (__lo), "=r" (__hi),	\
 			"=r" (__tmp)				\
 		: "m" (__ptr[__LSW]), "m" (__ptr[__MSW]),	\
@@ -233,10 +233,7 @@  do {								\
 		"	li %0, %4\n"				\
 		"	jump 2b, %1\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 3b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 3b)			\
 		: "+r" (err), "=r" (__tmp), "=m" (*(ptr))	\
 		: "rJ" (__x), "i" (-EFAULT));			\
 } while (0)
@@ -262,11 +259,8 @@  do {								\
 		"	li %0, %6\n"				\
 		"	jump 3b, %1\n"				\
 		"	.previous\n"				\
-		"	.section __ex_table,\"a\"\n"		\
-		"	.balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 4b\n"			\
-		"	" RISCV_PTR " 2b, 4b\n"			\
-		"	.previous"				\
+			_ASM_EXTABLE(1b, 4b)			\
+			_ASM_EXTABLE(2b, 4b)			\
 		: "+r" (err), "=r" (__tmp),			\
 			"=m" (__ptr[__LSW]),			\
 			"=m" (__ptr[__MSW])			\
@@ -417,10 +411,7 @@  unsigned long __must_check clear_user(void __user *to, unsigned long n)
 		"	li %[err], %[efault]\n"			\
 		"	jump 1b, %[rc]\n"			\
 		".previous\n"					\
-		".section __ex_table,\"a\"\n"			\
-		".balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 2b\n"			\
-		".previous\n"					\
+		_ASM_EXTABLE(1b, 2b)				\
 			: [ret] "=&r" (__ret),			\
 			  [rc]  "=&r" (__rc),			\
 			  [ptr] "+A" (*__ptr),			\
@@ -443,10 +434,7 @@  unsigned long __must_check clear_user(void __user *to, unsigned long n)
 		"	li %[err], %[efault]\n"			\
 		"	jump 1b, %[rc]\n"			\
 		".previous\n"					\
-		".section __ex_table,\"a\"\n"			\
-		".balign " RISCV_SZPTR "\n"			\
-		"	" RISCV_PTR " 1b, 2b\n"			\
-		".previous\n"					\
+		_ASM_EXTABLE(1b, 2b)				\
 			: [ret] "=&r" (__ret),			\
 			  [rc]  "=&r" (__rc),			\
 			  [ptr] "+A" (*__ptr),			\