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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044FC.mail.protection.outlook.com (10.167.241.202) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7228.0 via Frontend Transport; Fri, 19 Jan 2024 09:05:26 +0000 Received: from jasmine-meng.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Fri, 19 Jan 2024 03:05:20 -0600 From: Meng Li To: "Rafael J . Wysocki" , Borislav Petkov , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , "Oleksandr Natalenko" , Meng Li Subject: [PATCH V14 0/7] amd-pstate preferred core Date: Fri, 19 Jan 2024 17:04:55 +0800 Message-ID: <20240119090502.3869695-1-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|MW3PR12MB4379:EE_ X-MS-Office365-Filtering-Correlation-Id: 11dceb1d-0260-4c5c-bd60-08dc18cdc6f3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lveV0AWRzpzoRQ+g5hJeBxRxBBPfNjafs/VZ5sL0+/iQxnK8b7uIGPVbpDc/jXJ8nujJFxM19npH3DJKQ+i2Uznl8Z5RbHZpCzbom2ANWHLmm+u0jkfSKL/H3pHxz43PIQhliVHAQSZIbRNAYpDcp/m7YBlLMVfUHkzsGImM8NDzYiiTDinOHhKYGLBtcWK1XJKj5hFMQV2B4aQdUnVTYc/VYzrrPbBVWgULZ8++xqRMQK8pGg+q/NSdjXgMvHkxxg9n07oDJnGykFcfyD6o82vvTUzbhIlzbiXHlkW30NaY7NXUQnjbgj9qXIxoRx5dRM9F4VBqMuzBfI+hRKjzogh1rMTLBbtNoI3BKSEkG3h609TK0740dCrd4j1gZonui4pwGTusfLzjy7A/zUu6xlrCODZ+90ysRw3WxKhPwO7050X87pmFAINMKTZOpJwt2wLorOvVWzkoADzW0CsSfNX3Bx+VvrfLV6VrrrSOBwioVb6djxN9RvgBjhXJ8nOgpSYZWJd+1OTfJEDkMmtvfcrDGQv7gRtSlun1UP5n9zArKCXVBZs6vV5zXwU61akQ2xUGswoyvc0VhvV0LacVGvYEhgk9U0lNzmx9ILffpWuD362i3h2smZ1PXutcvpwfiZp/drNW5Umkghb48HXi5uDNoU5/FsKJUOWLtk7ta6SK+vJ112a7UDIF5Gp86EbMN9j8WE3gZ4Q8GpGZIgW/ndNQuzjmMgHWjcgpzjcF9B96psYrdArP8EMLhHZigKONitEXjqwCj+W+3h18VHx2/X3CqDyv8Ai5S2xxm3YTT0LHlplFICNlosOrWromNp2t X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(376002)(346002)(136003)(230922051799003)(230173577357003)(230273577357003)(64100799003)(82310400011)(186009)(1800799012)(451199024)(36840700001)(40470700004)(46966006)(8676002)(5660300002)(7416002)(4326008)(47076005)(8936002)(36756003)(40480700001)(36860700001)(426003)(26005)(16526019)(336012)(1076003)(70206006)(110136005)(70586007)(40460700003)(2906002)(7696005)(6636002)(54906003)(316002)(478600001)(6666004)(86362001)(83380400001)(2616005)(356005)(41300700001)(82740400003)(81166007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jan 2024 09:05:26.3586 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 11dceb1d-0260-4c5c-bd60-08dc18cdc6f3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4379 Hi all: The core frequency is subjected to the process variation in semiconductors. Not all cores are able to reach the maximum frequency respecting the infrastructure limits. Consequently, AMD has redefined the concept of maximum frequency of a part. This means that a fraction of cores can reach maximum frequency. To find the best process scheduling policy for a given scenario, OS needs to know the core ordering informed by the platform through highest performance capability register of the CPPC interface. Earlier implementations of amd-pstate preferred core only support a static core ranking and targeted performance. Now it has the ability to dynamically change the preferred core based on the workload and platform conditions and accounting for thermals and aging. Amd-pstate driver utilizes the functions and data structures provided by the ITMT architecture to enable the scheduler to favor scheduling on cores which can be get a higher frequency with lower voltage. We call it amd-pstate preferred core. Here sched_set_itmt_core_prio() is called to set priorities and sched_set_itmt_support() is called to enable ITMT feature. Amd-pstate driver uses the highest performance value to indicate the priority of CPU. The higher value has a higher priority. Amd-pstate driver will provide an initial core ordering at boot time. It relies on the CPPC interface to communicate the core ranking to the operating system and scheduler to make sure that OS is choosing the cores with highest performance firstly for scheduling the process. When amd-pstate driver receives a message with the highest performance change, it will update the core ranking. Changes from V13->V14: - cpufreq: - - fix build error without CONFIG_CPU_FREQ - ACPI: CPPC: Changes from V12->V13: - ACPI: CPPC: - - modify commit message. - - modify handle function of the notify(0x85). - cpufreq: amd-pstate: - - implement update_limits() callback function. - x86: - - pick up Acked-By flag added by Petkov. Changes from V11->V12: - all: - - pick up Reviewed-By flag added by Perry. - cpufreq: amd-pstate: - - rebase the latest linux-next and fixed conflicts. - - fixed the issue about cpudata without init in amd_pstate_update_highest_perf(). Changes from V10->V11: - cpufreq: amd-pstate: - - according Perry's commnts, I replace the string with str_enabled_disable(). Changes from V9->V10: - cpufreq: amd-pstate: - - add judgement for highest_perf. When it is less than 255, the preferred core feature is enabled. And it will set the priority. - - deleset "static u32 max_highest_perf" etc, because amd p-state perferred coe does not require specail process for hotpulg. Changes form V8->V9: - all: - - pick up Tested-By flag added by Oleksandr. - cpufreq: amd-pstate: - - pick up Review-By flag added by Wyes. - - ignore modification of bug. - - add a attribute of prefcore_ranking. - - modify data type conversion from u32 to int. - Documentation: amd-pstate: - - pick up Review-By flag added by Wyes. Changes form V7->V8: - all: - - pick up Review-By flag added by Mario and Ray. - cpufreq: amd-pstate: - - use hw_prefcore embeds into cpudata structure. - - delete preferred core init from cpu online/off. Changes form V6->V7: - x86: - - Modify kconfig about X86_AMD_PSTATE. - cpufreq: amd-pstate: - - modify incorrect comments about scheduler_work(). - - convert highest_perf data type. - - modify preferred core init when cpu init and online. - ACPI: CPPC: - - modify link of CPPC highest performance. - cpufreq: - - modify link of CPPC highest performance changed. Changes form V5->V6: - cpufreq: amd-pstate: - - modify the wrong tag order. - - modify warning about hw_prefcore sysfs attribute. - - delete duplicate comments. - - modify the variable name cppc_highest_perf to prefcore_ranking. - - modify judgment conditions for setting highest_perf. - - modify sysfs attribute for CPPC highest perf to pr_debug message. - Documentation: amd-pstate: - - modify warning: title underline too short. Changes form V4->V5: - cpufreq: amd-pstate: - - modify sysfs attribute for CPPC highest perf. - - modify warning about comments - - rebase linux-next - cpufreq: - - Moidfy warning about function declarations. - Documentation: amd-pstate: - - align with ``amd-pstat`` Changes form V3->V4: - Documentation: amd-pstate: - - Modify inappropriate descriptions. Changes form V2->V3: - x86: - - Modify kconfig and description. - cpufreq: amd-pstate: - - Add Co-developed-by tag in commit message. - cpufreq: - - Modify commit message. - Documentation: amd-pstate: - - Modify inappropriate descriptions. Changes form V1->V2: - ACPI: CPPC: - - Add reference link. - cpufreq: - - Moidfy link error. - cpufreq: amd-pstate: - - Init the priorities of all online CPUs - - Use a single variable to represent the status of preferred core. - Documentation: - - Default enabled preferred core. - Documentation: amd-pstate: - - Modify inappropriate descriptions. - - Default enabled preferred core. - - Use a single variable to represent the status of preferred core. Meng Li (7): x86: Drop CPU_SUP_INTEL from SCHED_MC_PRIO for the expansion. ACPI: CPPC: Add get the highest performance cppc control cpufreq: amd-pstate: Enable amd-pstate preferred core supporting. cpufreq: Add a notification message that the highest perf has changed cpufreq: amd-pstate: Update amd-pstate preferred core ranking dynamically Documentation: amd-pstate: introduce amd-pstate preferred core Documentation: introduce amd-pstate preferrd core mode kernel command line options .../admin-guide/kernel-parameters.txt | 5 + Documentation/admin-guide/pm/amd-pstate.rst | 59 +++++- arch/x86/Kconfig | 5 +- drivers/acpi/cppc_acpi.c | 13 ++ drivers/acpi/processor_driver.c | 6 + drivers/cpufreq/amd-pstate.c | 183 +++++++++++++++++- include/acpi/cppc_acpi.h | 5 + include/linux/amd-pstate.h | 10 + include/linux/cpufreq.h | 1 + 9 files changed, 275 insertions(+), 12 deletions(-)