| Message ID | 20240619113529.676940-1-cleger@rivosinc.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add support for a few Zc* extensions, Zcmop and Zimop | expand |
Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Wed, 19 Jun 2024 13:35:10 +0200 you wrote: > Add support for (yet again) more RVA23U64 missing extensions. Add > support for Zimop, Zcmop, Zca, Zcf, Zcd and Zcb extensions ISA string > parsing, hwprobe and kvm support. Zce, Zcmt and Zcmp extensions have > been left out since they target microcontrollers/embedded CPUs and are > not needed by RVA23U64. > > Since Zc* extensions states that C implies Zca, Zcf (if F and RV32), Zcd > (if D), this series modifies the way ISA string is parsed and now does > it in two phases. First one parses the string and the second one > validates it for the final ISA description. > > [...] Here is the summary with links: - [v7,01/16] dt-bindings: riscv: add Zimop ISA extension description https://git.kernel.org/riscv/c/a57b68bc315c - [v7,02/16] riscv: add ISA extension parsing for Zimop https://git.kernel.org/riscv/c/2467c2104f1f - [v7,03/16] riscv: hwprobe: export Zimop ISA extension https://git.kernel.org/riscv/c/36f8960de887 - [v7,04/16] RISC-V: KVM: Allow Zimop extension for Guest/VM https://git.kernel.org/riscv/c/fb2a3d63efef - [v7,05/16] KVM: riscv: selftests: Add Zimop extension to get-reg-list test https://git.kernel.org/riscv/c/ca5446406914 - [v7,06/16] dt-bindings: riscv: add Zca, Zcf, Zcd and Zcb ISA extension description https://git.kernel.org/riscv/c/e9f9946cad7b - [v7,07/16] riscv: add ISA extensions validation callback https://git.kernel.org/riscv/c/625034abd52a - [v7,08/16] riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb https://git.kernel.org/riscv/c/ba4cd855839d - [v7,09/16] riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions https://git.kernel.org/riscv/c/0ad70db5eb21 - [v7,10/16] RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM https://git.kernel.org/riscv/c/d964e8f2ae65 - [v7,11/16] KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test https://git.kernel.org/riscv/c/d27c34a73514 - [v7,12/16] dt-bindings: riscv: add Zcmop ISA extension description https://git.kernel.org/riscv/c/700556a73bc7 - [v7,13/16] riscv: add ISA extension parsing for Zcmop https://git.kernel.org/riscv/c/164d644059cf - [v7,14/16] riscv: hwprobe: export Zcmop ISA extension https://git.kernel.org/riscv/c/fc078ea317cc - [v7,15/16] RISC-V: KVM: Allow Zcmop extension for Guest/VM https://git.kernel.org/riscv/c/29cf9b803e6e - [v7,16/16] KVM: riscv: selftests: Add Zcmop extension to get-reg-list test https://git.kernel.org/riscv/c/e212d92d1a86 You are awesome, thank you!
Add support for (yet again) more RVA23U64 missing extensions. Add support for Zimop, Zcmop, Zca, Zcf, Zcd and Zcb extensions ISA string parsing, hwprobe and kvm support. Zce, Zcmt and Zcmp extensions have been left out since they target microcontrollers/embedded CPUs and are not needed by RVA23U64. Since Zc* extensions states that C implies Zca, Zcf (if F and RV32), Zcd (if D), this series modifies the way ISA string is parsed and now does it in two phases. First one parses the string and the second one validates it for the final ISA description. Link: https://lore.kernel.org/linux-riscv/20240404103254.1752834-1-cleger@rivosinc.com/ [1] Link: https://lore.kernel.org/all/20240409143839.558784-1-cleger@rivosinc.com/ [2] --- v7: - Rebased on riscv/for-next to fix conflicts v6: - Rebased on riscv/for-next - Remove ternary operator to use 'if()' instead in extension checks - v5: https://lore.kernel.org/all/20240517145302.971019-1-cleger@rivosinc.com/ v5: - Merged in Zimop to avoid any uneeded series dependencies - Rework dependency resolution loop to loop on source isa first rather than on all extension. - Disabled extensions in source isa once set in resolved isa - Rename riscv_resolve_isa() parameters - v4: https://lore.kernel.org/all/20240429150553.625165-1-cleger@rivosinc.com/ v4: - Modify validate() callbacks to return 0, -EPROBEDEFER or another error. - v3: https://lore.kernel.org/all/20240423124326.2532796-1-cleger@rivosinc.com/ v3: - Fix typo "exists" -> "exist" - Remove C implies Zca, Zcd, Zcf, dt-bindings rules - Rework ISA string resolver to handle dependencies - v2: https://lore.kernel.org/all/20240418124300.1387978-1-cleger@rivosinc.com/ v2: - Add Zc* dependencies validation in dt-bindings - v1: https://lore.kernel.org/lkml/20240410091106.749233-1-cleger@rivosinc.com/ Clément Léger (16): dt-bindings: riscv: add Zimop ISA extension description riscv: add ISA extension parsing for Zimop riscv: hwprobe: export Zimop ISA extension RISC-V: KVM: Allow Zimop extension for Guest/VM KVM: riscv: selftests: Add Zimop extension to get-reg-list test dt-bindings: riscv: add Zca, Zcf, Zcd and Zcb ISA extension description riscv: add ISA extensions validation callback riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test dt-bindings: riscv: add Zcmop ISA extension description riscv: add ISA extension parsing for Zcmop riscv: hwprobe: export Zcmop ISA extension RISC-V: KVM: Allow Zcmop extension for Guest/VM KVM: riscv: selftests: Add Zcmop extension to get-reg-list test Documentation/arch/riscv/hwprobe.rst | 28 ++ .../devicetree/bindings/riscv/extensions.yaml | 95 ++++++ arch/riscv/include/asm/cpufeature.h | 1 + arch/riscv/include/asm/hwcap.h | 6 + arch/riscv/include/uapi/asm/hwprobe.h | 6 + arch/riscv/include/uapi/asm/kvm.h | 6 + arch/riscv/kernel/cpufeature.c | 277 ++++++++++++------ arch/riscv/kernel/sys_hwprobe.c | 6 + arch/riscv/kvm/vcpu_onereg.c | 12 + .../selftests/kvm/riscv/get-reg-list.c | 24 ++ 10 files changed, 375 insertions(+), 86 deletions(-)