Message ID | 1-v5-4001c2997bd0+30c-iommufd_jgg@nvidia.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 4989764d8ed3d3d1024e4e831ff2affc40ee01d6 |
Headers | show |
Series | IOMMUFD Generic interface | expand |
On 2022/11/17 05:00, Jason Gunthorpe wrote: > This queries if a domain linked to a device should expect to support > enforce_cache_coherency() so iommufd can negotiate the rules for when a > domain should be shared or not. > > For iommufd a device that declares IOMMU_CAP_ENFORCE_CACHE_COHERENCY will > not be attached to a domain that does not support it. > > Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> > Reviewed-by: Kevin Tian <kevin.tian@intel.com> > Tested-by: Nicolin Chen <nicolinc@nvidia.com> > Tested-by: Yi Liu <yi.l.liu@intel.com> > Tested-by: Lixiao Yang <lixiao.yang@intel.com> > Tested-by: Matthew Rosato <mjrosato@linux.ibm.com> looks like Yu He's test-by was missed. :-) She has given it in below link. https://lore.kernel.org/kvm/DM6PR11MB268429C4986C7808760CCE72E0049@DM6PR11MB2684.namprd11.prod.outlook.com/ > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> > --- > drivers/iommu/amd/iommu.c | 2 ++ > drivers/iommu/intel/iommu.c | 16 +++++++++++----- > include/linux/iommu.h | 5 +++++ > 3 files changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c > index 45299eb7e8e306..240c535e317cc7 100644 > --- a/drivers/iommu/amd/iommu.c > +++ b/drivers/iommu/amd/iommu.c > @@ -2278,6 +2278,8 @@ static bool amd_iommu_capable(struct device *dev, enum iommu_cap cap) > return false; > case IOMMU_CAP_PRE_BOOT_PROTECTION: > return amdr_ivrs_remap_support; > + case IOMMU_CAP_ENFORCE_CACHE_COHERENCY: > + return true; > default: > break; > } > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index f298e51d5aa67a..157c9727411076 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -4450,14 +4450,20 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain) > > static bool intel_iommu_capable(struct device *dev, enum iommu_cap cap) > { > - if (cap == IOMMU_CAP_CACHE_COHERENCY) > + struct device_domain_info *info = dev_iommu_priv_get(dev); > + > + switch (cap) { > + case IOMMU_CAP_CACHE_COHERENCY: > return true; > - if (cap == IOMMU_CAP_INTR_REMAP) > + case IOMMU_CAP_INTR_REMAP: > return irq_remapping_enabled == 1; > - if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION) > + case IOMMU_CAP_PRE_BOOT_PROTECTION: > return dmar_platform_optin(); > - > - return false; > + case IOMMU_CAP_ENFORCE_CACHE_COHERENCY: > + return ecap_sc_support(info->iommu->ecap); > + default: > + return false; > + } > } > > static struct iommu_device *intel_iommu_probe_device(struct device *dev) > diff --git a/include/linux/iommu.h b/include/linux/iommu.h > index 68d7d304cdb761..a09fd32d8cc273 100644 > --- a/include/linux/iommu.h > +++ b/include/linux/iommu.h > @@ -124,6 +124,11 @@ enum iommu_cap { > IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ > IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for > DMA protection and we should too */ > + /* > + * Per-device flag indicating if enforce_cache_coherency() will work on > + * this device. > + */ > + IOMMU_CAP_ENFORCE_CACHE_COHERENCY, > }; > > /* These are the possible reserved region types */
On Wed, Nov 23, 2022 at 04:30:23PM +0800, Yi Liu wrote: > On 2022/11/17 05:00, Jason Gunthorpe wrote: > > This queries if a domain linked to a device should expect to support > > enforce_cache_coherency() so iommufd can negotiate the rules for when a > > domain should be shared or not. > > > > For iommufd a device that declares IOMMU_CAP_ENFORCE_CACHE_COHERENCY will > > not be attached to a domain that does not support it. > > > > Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> > > Reviewed-by: Kevin Tian <kevin.tian@intel.com> > > Tested-by: Nicolin Chen <nicolinc@nvidia.com> > > Tested-by: Yi Liu <yi.l.liu@intel.com> > > Tested-by: Lixiao Yang <lixiao.yang@intel.com> > > Tested-by: Matthew Rosato <mjrosato@linux.ibm.com> > > looks like Yu He's test-by was missed. :-) She has given it in below link. Oops, I fixed it thanks Jason
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 45299eb7e8e306..240c535e317cc7 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -2278,6 +2278,8 @@ static bool amd_iommu_capable(struct device *dev, enum iommu_cap cap) return false; case IOMMU_CAP_PRE_BOOT_PROTECTION: return amdr_ivrs_remap_support; + case IOMMU_CAP_ENFORCE_CACHE_COHERENCY: + return true; default: break; } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f298e51d5aa67a..157c9727411076 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4450,14 +4450,20 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain) static bool intel_iommu_capable(struct device *dev, enum iommu_cap cap) { - if (cap == IOMMU_CAP_CACHE_COHERENCY) + struct device_domain_info *info = dev_iommu_priv_get(dev); + + switch (cap) { + case IOMMU_CAP_CACHE_COHERENCY: return true; - if (cap == IOMMU_CAP_INTR_REMAP) + case IOMMU_CAP_INTR_REMAP: return irq_remapping_enabled == 1; - if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION) + case IOMMU_CAP_PRE_BOOT_PROTECTION: return dmar_platform_optin(); - - return false; + case IOMMU_CAP_ENFORCE_CACHE_COHERENCY: + return ecap_sc_support(info->iommu->ecap); + default: + return false; + } } static struct iommu_device *intel_iommu_probe_device(struct device *dev) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 68d7d304cdb761..a09fd32d8cc273 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -124,6 +124,11 @@ enum iommu_cap { IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for DMA protection and we should too */ + /* + * Per-device flag indicating if enforce_cache_coherency() will work on + * this device. + */ + IOMMU_CAP_ENFORCE_CACHE_COHERENCY, }; /* These are the possible reserved region types */