| Message ID | 20230214184606.510551-4-mizhang@google.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Overhauling amx_test | expand |
On Tue, Feb 14, 2023 at 6:46 PM Mingwei Zhang <mizhang@google.com> wrote: > > Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM > handler in amx_test. This is because XFD may not be the only reason of > the IA32_XFD MSR and the bitmap corresponding to the state components > required by the faulting instruction." (Intel SDM vol 1. Section 13.14) > > Add the missing check of CR0.TS. > > Signed-off-by: Mingwei Zhang <mizhang@google.com> > --- > tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c > index aac727ff7cf8..847752998660 100644 > --- a/tools/testing/selftests/kvm/x86_64/amx_test.c > +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c > @@ -215,6 +215,7 @@ void guest_nm_handler(struct ex_regs *regs) > { > /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ > GUEST_SYNC(7); > + GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); Can't we infer that the #NM is the result of an XFD error due to the fact that IA32_XFD_ERR is set? Is this check needed? SDM vol 1, 13.14, EXTENDED FEATURE DISABLE (XFD) - Device-not-available exceptions that are not due to XFD - those resulting from setting CR0.TS to 1 - do not modify the IA32_XFD_ERR MSR. > GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); > GUEST_SYNC(8); > GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); > -- > 2.39.1.581.gbfd45094c4-goog >
On Fri, Feb 17, 2023, Aaron Lewis wrote: > On Tue, Feb 14, 2023 at 6:46 PM Mingwei Zhang <mizhang@google.com> wrote: > > > > Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM > > handler in amx_test. This is because XFD may not be the only reason of > > the IA32_XFD MSR and the bitmap corresponding to the state components > > required by the faulting instruction." (Intel SDM vol 1. Section 13.14) > > > > Add the missing check of CR0.TS. > > > > Signed-off-by: Mingwei Zhang <mizhang@google.com> > > --- > > tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c > > index aac727ff7cf8..847752998660 100644 > > --- a/tools/testing/selftests/kvm/x86_64/amx_test.c > > +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c > > @@ -215,6 +215,7 @@ void guest_nm_handler(struct ex_regs *regs) > > { > > /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ > > GUEST_SYNC(7); > > + GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); > > Can't we infer that the #NM is the result of an XFD error due to the fact > that IA32_XFD_ERR is set? Is this check needed? > SDM vol 1, 13.14, EXTENDED FEATURE DISABLE (XFD) > - Device-not-available exceptions that are not due to XFD - those > resulting from setting CR0.TS to 1 - do not modify the IA32_XFD_ERR > MSR. > We don't infer from the reasons of #NM and that is the purpose of this selftest. Yes, this looks a little bit pedantic. But still, it is worth adding the check since violation of that indicates either 1) the selftest mistakenly did not clear XFD_ERR prior to #NM or 2) hardware is broken. > > GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); > > GUEST_SYNC(8); > > GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); > > -- > > 2.39.1.581.gbfd45094c4-goog > >
diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index aac727ff7cf8..847752998660 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -215,6 +215,7 @@ void guest_nm_handler(struct ex_regs *regs) { /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ GUEST_SYNC(7); + GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA);
Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM handler in amx_test. This is because XFD may not be the only reason of the IA32_XFD MSR and the bitmap corresponding to the state components required by the faulting instruction." (Intel SDM vol 1. Section 13.14) Add the missing check of CR0.TS. Signed-off-by: Mingwei Zhang <mizhang@google.com> --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+)