| Message ID | 20240412-zve-detection-v4-1-e0c45bb6b253@sifive.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Support Zve32[xf] and Zve64[xfd] Vector subextensions | expand |
On Fri, Apr 12, 2024 at 02:48:57PM +0800, Andy Chiu wrote: > The function would fail when it detects the calling hart's vlen doesn't > match the first one's. The boot hart is the first hart calling this > function during riscv_fill_hwcap, so it is impossible to fail here. Add > a comment about this behavior. > > Signed-off-by: Andy Chiu <andy.chiu@sifive.com> > --- > Changelog v2: > - update the comment (Conor) > --- > arch/riscv/kernel/cpufeature.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 3ed2359eae35..d22b12072579 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -683,6 +683,10 @@ void __init riscv_fill_hwcap(void) > } > > if (elf_hwcap & COMPAT_HWCAP_ISA_V) { > + /* > + * This callsite can't fail here. It cannot fail when called on > + * the boot hart. I am loathe to comment on this again, so Reviewed-by: Conor Dooley <conor.dooley@microchip.com> but you could just write this as "This cannot fail when called on the boot hart." Cheers, Conor. > + */ > riscv_v_setup_vsize(); > /* > * ISA string in device tree might have 'v' flag, but > > -- > 2.44.0.rc2 >
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 3ed2359eae35..d22b12072579 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -683,6 +683,10 @@ void __init riscv_fill_hwcap(void) } if (elf_hwcap & COMPAT_HWCAP_ISA_V) { + /* + * This callsite can't fail here. It cannot fail when called on + * the boot hart. + */ riscv_v_setup_vsize(); /* * ISA string in device tree might have 'v' flag, but
The function would fail when it detects the calling hart's vlen doesn't match the first one's. The boot hart is the first hart calling this function during riscv_fill_hwcap, so it is impossible to fail here. Add a comment about this behavior. Signed-off-by: Andy Chiu <andy.chiu@sifive.com> --- Changelog v2: - update the comment (Conor) --- arch/riscv/kernel/cpufeature.c | 4 ++++ 1 file changed, 4 insertions(+)