| Message ID | 20240528041926.3989-2-manali.shukla@amd.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for the Idle HLT intercept feature | expand |
On Tue, May 28, 2024 at 04:19:22AM +0000, Manali Shukla wrote: > From: Manali Shukla <Manali.Shukla@amd.com> > > The Idle HLT Intercept feature allows for the HLT instruction execution > by a vCPU to be intercepted by the hypervisor only if there are no > pending events (V_INTR and V_NMI) for the vCPU. When the vCPU is > expected to service the pending events (V_INTR and V_NMI), the Idle HLT > intercept won’t trigger. The feature allows the hypervisor to determine > if the vCPU is idle and reduces wasteful VMEXITs. > > Presence of Idle HLT intercept feature for guests is indicated via CPUID > function 0x8000000A_EDX[30]. > > Signed-off-by: Manali Shukla <Manali.Shukla@amd.com> > --- > arch/x86/include/asm/cpufeatures.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h > index a38f8f9ba657..a8c5dec042dc 100644 > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -381,6 +381,7 @@ > #define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* Virtual SPEC_CTRL */ > #define X86_FEATURE_VNMI (15*32+25) /* Virtual NMI */ > #define X86_FEATURE_SVME_ADDR_CHK (15*32+28) /* "" SVME addr check */ > +#define X86_FEATURE_IDLE_HLT (15*32+30) /* "" IDLE HLT intercept */ > > /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ > #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/ > > base-commit: d91a9cc16417b8247213a0144a1f0fd61dc855dd > -- Acked-by: Borislav Petkov (AMD) <bp@alien8.de>
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index a38f8f9ba657..a8c5dec042dc 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -381,6 +381,7 @@ #define X86_FEATURE_V_SPEC_CTRL (15*32+20) /* Virtual SPEC_CTRL */ #define X86_FEATURE_VNMI (15*32+25) /* Virtual NMI */ #define X86_FEATURE_SVME_ADDR_CHK (15*32+28) /* "" SVME addr check */ +#define X86_FEATURE_IDLE_HLT (15*32+30) /* "" IDLE HLT intercept */ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ECX), word 16 */ #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit Manipulation instructions*/